JPS57134939A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57134939A
JPS57134939A JP56021156A JP2115681A JPS57134939A JP S57134939 A JPS57134939 A JP S57134939A JP 56021156 A JP56021156 A JP 56021156A JP 2115681 A JP2115681 A JP 2115681A JP S57134939 A JPS57134939 A JP S57134939A
Authority
JP
Japan
Prior art keywords
groove
layers
shallower
etching
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56021156A
Other languages
Japanese (ja)
Inventor
Takeshi Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56021156A priority Critical patent/JPS57134939A/en
Publication of JPS57134939A publication Critical patent/JPS57134939A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To easily manufacture a semiconductor device with high breakdown voltage and a low leak current by providing the third groove over and shallower than the first and the second layers. CONSTITUTION:In manufacture of a diode, the first 2 and the scond 3 of p type diffusion layers are formed on an n type semiconductor substrate 1. Then the first groove 4 shallower than the first and the second layers is formed. The second groove 7 is formed by etching shallower than the diffusion depth of and over the first and the second layers 2, 3. A glass layer 5 deposited on the first groove 4 and the second groove 7 removes defects on the main surface of the semiconductor substrate by etching which increases breakdown voltage and decreases a leak current. The depositing method of glass is also made easy.
JP56021156A 1981-02-13 1981-02-13 Semiconductor device Pending JPS57134939A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56021156A JPS57134939A (en) 1981-02-13 1981-02-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56021156A JPS57134939A (en) 1981-02-13 1981-02-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57134939A true JPS57134939A (en) 1982-08-20

Family

ID=12047039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56021156A Pending JPS57134939A (en) 1981-02-13 1981-02-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57134939A (en)

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