JPS57124455A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57124455A
JPS57124455A JP56010388A JP1038881A JPS57124455A JP S57124455 A JPS57124455 A JP S57124455A JP 56010388 A JP56010388 A JP 56010388A JP 1038881 A JP1038881 A JP 1038881A JP S57124455 A JPS57124455 A JP S57124455A
Authority
JP
Japan
Prior art keywords
cap
semiconductor device
adhesives
package member
frame body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56010388A
Other languages
Japanese (ja)
Inventor
Kazuo Okano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56010388A priority Critical patent/JPS57124455A/en
Publication of JPS57124455A publication Critical patent/JPS57124455A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/163Connection portion, e.g. seal

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To manufacture the semiconductor device having high quality in excellent yield by sealing a cap and a package member by the adhesives of a frame body. CONSTITUTION:The cap 25 and the package member 21 to which a semicoductor element 22 is mounted are sealed by the adhesives 24 of the frame body 26 having the adhesives 24 at the outside of the cap 25. Accordingly, sealing glass is attached to the cap consisting of a light transmitting member, and the semiconductor device having high quality can be manufactured in excellent yield without degrading the semiconductor device. The cap is easily positioned by forming the semiconductor device so that the surface of the package member and the surface of the cap are located on the same plane, and the quantity of the adhesives used can be decreased.
JP56010388A 1981-01-27 1981-01-27 Semiconductor device Pending JPS57124455A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56010388A JPS57124455A (en) 1981-01-27 1981-01-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56010388A JPS57124455A (en) 1981-01-27 1981-01-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57124455A true JPS57124455A (en) 1982-08-03

Family

ID=11748734

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56010388A Pending JPS57124455A (en) 1981-01-27 1981-01-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57124455A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0540884A (en) * 1991-08-07 1993-02-19 Tokyo Electric Co Ltd Electronic cash register

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0540884A (en) * 1991-08-07 1993-02-19 Tokyo Electric Co Ltd Electronic cash register

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