JPS55166939A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS55166939A
JPS55166939A JP7437479A JP7437479A JPS55166939A JP S55166939 A JPS55166939 A JP S55166939A JP 7437479 A JP7437479 A JP 7437479A JP 7437479 A JP7437479 A JP 7437479A JP S55166939 A JPS55166939 A JP S55166939A
Authority
JP
Japan
Prior art keywords
frame
kover
cap
ultraviolet rays
seam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7437479A
Other languages
Japanese (ja)
Other versions
JPS6222455B2 (en
Inventor
Katsuhiko Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7437479A priority Critical patent/JPS55166939A/en
Publication of JPS55166939A publication Critical patent/JPS55166939A/en
Publication of JPS6222455B2 publication Critical patent/JPS6222455B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To maintain a secure airtightness by absorbing thermal and mechanical stress with a cap, wherein a window frame type cap, having a ultraviolet rays transmission glass covering, is sealed by seam-welding on a frame body, which is an integration of a thin Kover plate and a thick Kover frame. CONSTITUTION:A semiconductor chip 2b of a ultraviolet rays eliminating type EPROM or the like is adhered to a ceramic substrate 1b. A seal frame 7b is soldered to the upper surrounding section of the bonding pad section 4b provided on the surface of the substrate 1b. A cap 8b for hermetical sealing is consisted of a formed cap 9b of a drawn Kover plate having a square hole in the center, a ultraviolet rays transmitting glass 10b and a Kover frame 11b for adhesion of glass. The Kover frame 11b of the cap is inserted to the seal frame 7b and sealed by seam- welding. As a result, the thermal and mechanical stress is sufficiently absorbed by the cap, so a plastic deformation does not occur to the Kover frame and a secure airtightness can be maintained.
JP7437479A 1979-06-13 1979-06-13 Semiconductor device Granted JPS55166939A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7437479A JPS55166939A (en) 1979-06-13 1979-06-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7437479A JPS55166939A (en) 1979-06-13 1979-06-13 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS55166939A true JPS55166939A (en) 1980-12-26
JPS6222455B2 JPS6222455B2 (en) 1987-05-18

Family

ID=13545323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7437479A Granted JPS55166939A (en) 1979-06-13 1979-06-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS55166939A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6894853B2 (en) * 2002-05-10 2005-05-17 Texas Instruments Incorporated Stress relieved frame
JP2006145610A (en) * 2004-11-16 2006-06-08 Shinko Electric Ind Co Ltd Package for housing optical component

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6894853B2 (en) * 2002-05-10 2005-05-17 Texas Instruments Incorporated Stress relieved frame
US7402458B2 (en) 2002-05-10 2008-07-22 Texas Instruments Incorporated Stress relieved flat frame for DMD window
JP2006145610A (en) * 2004-11-16 2006-06-08 Shinko Electric Ind Co Ltd Package for housing optical component

Also Published As

Publication number Publication date
JPS6222455B2 (en) 1987-05-18

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