JPS57120178A - Multiplying circuit - Google Patents

Multiplying circuit

Info

Publication number
JPS57120178A
JPS57120178A JP474681A JP474681A JPS57120178A JP S57120178 A JPS57120178 A JP S57120178A JP 474681 A JP474681 A JP 474681A JP 474681 A JP474681 A JP 474681A JP S57120178 A JPS57120178 A JP S57120178A
Authority
JP
Japan
Prior art keywords
signal
capacitor
resistance
circuit
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP474681A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0158549B2 (enrdf_load_stackoverflow
Inventor
Michio Saeki
Tadashi Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Azbil Corp
Original Assignee
Azbil Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azbil Corp filed Critical Azbil Corp
Priority to JP474681A priority Critical patent/JPS57120178A/ja
Publication of JPS57120178A publication Critical patent/JPS57120178A/ja
Publication of JPH0158549B2 publication Critical patent/JPH0158549B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/16—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
    • G06G7/161—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division with pulse modulation, e.g. modulation of amplitude, width, frequency, phase or form

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Manipulation Of Pulses (AREA)
JP474681A 1981-01-16 1981-01-16 Multiplying circuit Granted JPS57120178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP474681A JPS57120178A (en) 1981-01-16 1981-01-16 Multiplying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP474681A JPS57120178A (en) 1981-01-16 1981-01-16 Multiplying circuit

Publications (2)

Publication Number Publication Date
JPS57120178A true JPS57120178A (en) 1982-07-27
JPH0158549B2 JPH0158549B2 (enrdf_load_stackoverflow) 1989-12-12

Family

ID=11592474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP474681A Granted JPS57120178A (en) 1981-01-16 1981-01-16 Multiplying circuit

Country Status (1)

Country Link
JP (1) JPS57120178A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009282782A (ja) * 2008-05-22 2009-12-03 Sharp Corp 抵抗変化型可変抵抗素子を備えた積演算装置、及び積和演算装置、これらの装置を各ニューロン素子に備えるニューラルネットワーク、並びに積演算方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009282782A (ja) * 2008-05-22 2009-12-03 Sharp Corp 抵抗変化型可変抵抗素子を備えた積演算装置、及び積和演算装置、これらの装置を各ニューロン素子に備えるニューラルネットワーク、並びに積演算方法

Also Published As

Publication number Publication date
JPH0158549B2 (enrdf_load_stackoverflow) 1989-12-12

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