JPS55147835A - Frequency dividing circuit - Google Patents

Frequency dividing circuit

Info

Publication number
JPS55147835A
JPS55147835A JP5583079A JP5583079A JPS55147835A JP S55147835 A JPS55147835 A JP S55147835A JP 5583079 A JP5583079 A JP 5583079A JP 5583079 A JP5583079 A JP 5583079A JP S55147835 A JPS55147835 A JP S55147835A
Authority
JP
Japan
Prior art keywords
terminal
input
capacitor
frequency dividing
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5583079A
Other languages
Japanese (ja)
Inventor
Kazumi Kawashima
Minoru Ueda
Sadahiro Takuhara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5583079A priority Critical patent/JPS55147835A/en
Publication of JPS55147835A publication Critical patent/JPS55147835A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/00006—Changing the frequency

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To obtain a simple frequency dividing circuit without a FF circuit, by inputting clock pulses to a level comparator equipped with a capacitor for feedback. CONSTITUTION:Clock pulses are input from input terminal 1 and is input to the + terminal of comparator 6 through the differentiating circuit consisting of capacitor 2 and resistance 3 and through diode 4. The + terminal is grounded through resistances 5 and is connected to output terminal 10 through capacitor 11 for feedback. A voltage obtained by dividing the voltage of DC power source terminal by resistance 8 and 9 is applied to the - termianl. The time constant of the differentiating circuit is set to a value larger than half period (t) of input clocks and smaller than 2t.
JP5583079A 1979-05-07 1979-05-07 Frequency dividing circuit Pending JPS55147835A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5583079A JPS55147835A (en) 1979-05-07 1979-05-07 Frequency dividing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5583079A JPS55147835A (en) 1979-05-07 1979-05-07 Frequency dividing circuit

Publications (1)

Publication Number Publication Date
JPS55147835A true JPS55147835A (en) 1980-11-18

Family

ID=13009879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5583079A Pending JPS55147835A (en) 1979-05-07 1979-05-07 Frequency dividing circuit

Country Status (1)

Country Link
JP (1) JPS55147835A (en)

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