JPS5710947A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPS5710947A
JPS5710947A JP8532280A JP8532280A JPS5710947A JP S5710947 A JPS5710947 A JP S5710947A JP 8532280 A JP8532280 A JP 8532280A JP 8532280 A JP8532280 A JP 8532280A JP S5710947 A JPS5710947 A JP S5710947A
Authority
JP
Japan
Prior art keywords
film
layer
solder
wiring body
oxidized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8532280A
Other languages
Japanese (ja)
Other versions
JPS639662B2 (en
Inventor
Mamoru Yanagisawa
Hidehiko Akasaki
Tomio Oda
Takehisa Tsujimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8532280A priority Critical patent/JPS5710947A/en
Publication of JPS5710947A publication Critical patent/JPS5710947A/en
Publication of JPS639662B2 publication Critical patent/JPS639662B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05569—Disposition the external layer being disposed on a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Abstract

PURPOSE:To manufacture a wiring body, to which a solder-bump is mounted, easly by forming a film for preventing the adhesion of solder onto the surface of the wiring body by an oxide film is wiring body metal. CONSTITUTION:An SiO2 film 10 is formed on a semiconductor substrate 1 with a base region 2 and an emitter region 3. The metals of Ti, which excellently adheres on the silicon substrate 1 and the SiO2 film 10, and Ni, which is easily oxidized and on the oxide film thereof solder does not adhere, are laminated by means of evaporation, and patterned, and the wiring body consisting of a Ti layer 13 and a Ni layer 14 is shaped. A photoresist film 15 using pad sections 6 as opening sections is formed, and Au layers 16, 16' are shaped by means of evaporation. The photoresist film 15 and the Au layer 16' on the film 15 are removed, the surface of the exposed Ni layer 14 is oxidized and an oxidized Ni film 17 is molded. The solder- bump 18 is formed on the Au layer 16.
JP8532280A 1980-06-24 1980-06-24 Semiconductor element Granted JPS5710947A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8532280A JPS5710947A (en) 1980-06-24 1980-06-24 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8532280A JPS5710947A (en) 1980-06-24 1980-06-24 Semiconductor element

Publications (2)

Publication Number Publication Date
JPS5710947A true JPS5710947A (en) 1982-01-20
JPS639662B2 JPS639662B2 (en) 1988-03-01

Family

ID=13855377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8532280A Granted JPS5710947A (en) 1980-06-24 1980-06-24 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS5710947A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011187946A (en) * 2010-02-16 2011-09-22 Internatl Rectifier Corp Iii-nitride power device with solderable front metal
KR20120109309A (en) * 2011-03-23 2012-10-08 소니 주식회사 Semiconductor device, method of manufacturing the same, and method of manufacturing wiring board
JP2013235928A (en) * 2012-05-08 2013-11-21 Murata Mfg Co Ltd Ceramic electronic component and electronic device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011187946A (en) * 2010-02-16 2011-09-22 Internatl Rectifier Corp Iii-nitride power device with solderable front metal
US8853744B2 (en) 2010-02-16 2014-10-07 International Rectifier Corporation Power device with solderable front metal
KR20120109309A (en) * 2011-03-23 2012-10-08 소니 주식회사 Semiconductor device, method of manufacturing the same, and method of manufacturing wiring board
JP2012204391A (en) * 2011-03-23 2012-10-22 Sony Corp Semiconductor device, semiconductor device manufacturing method, and circuit board manufacturing method
JP2013235928A (en) * 2012-05-08 2013-11-21 Murata Mfg Co Ltd Ceramic electronic component and electronic device

Also Published As

Publication number Publication date
JPS639662B2 (en) 1988-03-01

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