JPS5678132A - Wire bonding method and device - Google Patents

Wire bonding method and device

Info

Publication number
JPS5678132A
JPS5678132A JP15433979A JP15433979A JPS5678132A JP S5678132 A JPS5678132 A JP S5678132A JP 15433979 A JP15433979 A JP 15433979A JP 15433979 A JP15433979 A JP 15433979A JP S5678132 A JPS5678132 A JP S5678132A
Authority
JP
Japan
Prior art keywords
positions
pads
detected
rest
memorized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15433979A
Other languages
Japanese (ja)
Inventor
Tamotsu Usami
Kanji Otsuka
Takashi Araki
Mutsuo Fuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NITSUKAN DENSHI KK
Hitachi Ltd
Original Assignee
NITSUKAN DENSHI KK
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NITSUKAN DENSHI KK, Hitachi Ltd filed Critical NITSUKAN DENSHI KK
Priority to JP15433979A priority Critical patent/JPS5678132A/en
Publication of JPS5678132A publication Critical patent/JPS5678132A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10162—Shape being a cuboid with a square active surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To accurately perform the line junction for the subject wire bonding by a method wherein the positions of a pad and an inner lead of a semiconductor are detected and memorized, a part of these positions is redetected and compared with the memorized ones, and a correct positioning is performed automatically. CONSTITUTION:A semiconductor device 7 is temporarily fixed on a rest 15, the position of the inner lead 6, whereon a line junction with the positions of the pads 5a and 5b on a pellet 2 will be performed, is detected and the value of a relative position is memorized. The device 7 is shifted to and fixed on a rest 23 of an automatic bonder 22 and the positions of the pads 5a and 5b or leads 6a and 6b, which can be easily ascertained in the lead 6, are detected 20. By comparing the detected value with the memory 19, the positions of all the pads and the inner leads can be relatively found on the basis of the positions of the pads 5a, 5b and leads 6a, 6b. Based on the compared results and by controlling and shifting the rest 23 and a tool 24, the line junction 22 can be accurately performed automatically with a high working efficiency.
JP15433979A 1979-11-30 1979-11-30 Wire bonding method and device Pending JPS5678132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15433979A JPS5678132A (en) 1979-11-30 1979-11-30 Wire bonding method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15433979A JPS5678132A (en) 1979-11-30 1979-11-30 Wire bonding method and device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP60212490A Division JPS61111551A (en) 1985-09-27 1985-09-27 Wire bonder

Publications (1)

Publication Number Publication Date
JPS5678132A true JPS5678132A (en) 1981-06-26

Family

ID=15581982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15433979A Pending JPS5678132A (en) 1979-11-30 1979-11-30 Wire bonding method and device

Country Status (1)

Country Link
JP (1) JPS5678132A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6324833U (en) * 1986-07-31 1988-02-18
US4881029A (en) * 1985-09-30 1989-11-14 Kabushiki Kaisha Toshiba Semiconductor integrated circuit devices and methods for testing same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375764A (en) * 1976-12-16 1978-07-05 Nec Corp Automatic wire bonding unit
JPS54121672A (en) * 1978-03-14 1979-09-20 Nichiden Kikai Kk Wire bonding device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375764A (en) * 1976-12-16 1978-07-05 Nec Corp Automatic wire bonding unit
JPS54121672A (en) * 1978-03-14 1979-09-20 Nichiden Kikai Kk Wire bonding device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4881029A (en) * 1985-09-30 1989-11-14 Kabushiki Kaisha Toshiba Semiconductor integrated circuit devices and methods for testing same
JPS6324833U (en) * 1986-07-31 1988-02-18
JPH0436111Y2 (en) * 1986-07-31 1992-08-26

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