JPS5450267A - Automatic wire bonding method - Google Patents

Automatic wire bonding method

Info

Publication number
JPS5450267A
JPS5450267A JP11635777A JP11635777A JPS5450267A JP S5450267 A JPS5450267 A JP S5450267A JP 11635777 A JP11635777 A JP 11635777A JP 11635777 A JP11635777 A JP 11635777A JP S5450267 A JPS5450267 A JP S5450267A
Authority
JP
Japan
Prior art keywords
spot
stored
chip
wire bonding
correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11635777A
Other languages
Japanese (ja)
Other versions
JPS5826664B2 (en
Inventor
Hiroshi Sakurai
Yoshinari Enomoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP52116357A priority Critical patent/JPS5826664B2/en
Publication of JPS5450267A publication Critical patent/JPS5450267A/en
Publication of JPS5826664B2 publication Critical patent/JPS5826664B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To automatically bond a multiplicity of chip parts on the same substrate and the patterns on bonded substrate by employing a suitable position detecting system.
CONSTITUTION: At the time of starting wire bonding from a chip 6, the operator lets correction quantities from programmed bonding position reference coordinates be stored in a computer by a spot 11 or line 10 and the pulse numbers of an X-Y base. For example, pads 31, 26 and glands 21, 16 are registered by the spot 11 and the correction quantity is stored. Next the operator moves the spot from the chip 6 to 7 through a microscpoe and likewise the correction value is stored. After the correction value of respevtice parts are stored subsequently, the spot is matched to the start position and the control unit is started, then all wiring bondings on the substrate may be performed at high speed without intermission
COPYRIGHT: (C)1979,JPO&Japio
JP52116357A 1977-09-27 1977-09-27 automatic wire bonding method Expired JPS5826664B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52116357A JPS5826664B2 (en) 1977-09-27 1977-09-27 automatic wire bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52116357A JPS5826664B2 (en) 1977-09-27 1977-09-27 automatic wire bonding method

Publications (2)

Publication Number Publication Date
JPS5450267A true JPS5450267A (en) 1979-04-20
JPS5826664B2 JPS5826664B2 (en) 1983-06-04

Family

ID=14684950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52116357A Expired JPS5826664B2 (en) 1977-09-27 1977-09-27 automatic wire bonding method

Country Status (1)

Country Link
JP (1) JPS5826664B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56110244A (en) * 1980-02-06 1981-09-01 Hitachi Ltd Printed circuit board for semiconductor device and wire bonding method thereof
JPS59105330A (en) * 1982-12-08 1984-06-18 Hitachi Ltd Automatic wire bonder
US5862974A (en) * 1995-10-23 1999-01-26 Kabushiki Kaisha Shinkawa Wire bonding method and apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059942U (en) * 1983-09-30 1985-04-25 株式会社島津製作所 Liquid sample automatic collection device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56110244A (en) * 1980-02-06 1981-09-01 Hitachi Ltd Printed circuit board for semiconductor device and wire bonding method thereof
JPS6337498B2 (en) * 1980-02-06 1988-07-26 Hitachi Seisakusho Kk
JPS59105330A (en) * 1982-12-08 1984-06-18 Hitachi Ltd Automatic wire bonder
JPH0380345B2 (en) * 1982-12-08 1991-12-24 Hitachi Ltd
US5862974A (en) * 1995-10-23 1999-01-26 Kabushiki Kaisha Shinkawa Wire bonding method and apparatus

Also Published As

Publication number Publication date
JPS5826664B2 (en) 1983-06-04

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