JPS567126A - Initializing system - Google Patents
Initializing systemInfo
- Publication number
- JPS567126A JPS567126A JP8191279A JP8191279A JPS567126A JP S567126 A JPS567126 A JP S567126A JP 8191279 A JP8191279 A JP 8191279A JP 8191279 A JP8191279 A JP 8191279A JP S567126 A JPS567126 A JP S567126A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- data
- register
- writing
- fault
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Detection And Correction Of Errors (AREA)
- Retry When Errors Occur (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE: To ensure the confirmation even for the normalcy for the writing action or the register reading of the microprogram, by securing such circuit constitution in which the initial value setting means, the fault detecting means and the microprogram control means are included.
CONSTITUTION: The following means are provided: initial value setting means 1 which delivers initial value setting signal 11 based on initializing signal 10; fault detecting means 3 which detects the parity of the data stored in register 2; microprogram control means 4 which delivers fault display lamp lighting signal 16, writing data 14 and writing designation signal 15 in response to fault detection display signal 13 and the output data of register 2 each; and others. In such constitution, output data 12 of register 2 is read based on the designation from means 4 and in case signal 13 is "1" to be compared with the data which is precedingly written into data 2. And in case no agreement is obtained in the comparison result, it is found that some fault has occured at means 4 relating the reading or writing action, writing data bus 14, register 2, signal 15 or the bus of data 12.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8191279A JPS567126A (en) | 1979-06-28 | 1979-06-28 | Initializing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8191279A JPS567126A (en) | 1979-06-28 | 1979-06-28 | Initializing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS567126A true JPS567126A (en) | 1981-01-24 |
Family
ID=13759649
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8191279A Pending JPS567126A (en) | 1979-06-28 | 1979-06-28 | Initializing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS567126A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6017541A (en) * | 1983-03-31 | 1985-01-29 | Fujitsu Ltd | Test control system with error checking function |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49123549A (en) * | 1973-03-30 | 1974-11-26 | ||
JPS5333338B2 (en) * | 1973-07-11 | 1978-09-13 |
-
1979
- 1979-06-28 JP JP8191279A patent/JPS567126A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49123549A (en) * | 1973-03-30 | 1974-11-26 | ||
JPS5333338B2 (en) * | 1973-07-11 | 1978-09-13 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6017541A (en) * | 1983-03-31 | 1985-01-29 | Fujitsu Ltd | Test control system with error checking function |
JPH0434180B2 (en) * | 1983-03-31 | 1992-06-05 | Fujitsu Ltd |
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