JPS55139698A - Error processing system of memory unit - Google Patents
Error processing system of memory unitInfo
- Publication number
- JPS55139698A JPS55139698A JP4700379A JP4700379A JPS55139698A JP S55139698 A JPS55139698 A JP S55139698A JP 4700379 A JP4700379 A JP 4700379A JP 4700379 A JP4700379 A JP 4700379A JP S55139698 A JPS55139698 A JP S55139698A
- Authority
- JP
- Japan
- Prior art keywords
- error
- data
- memory
- bus
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To make it possible to reduce the capacity of a memory and also to take a requested measure to an error corresponding to the kind of the error by storing error-permissible data and error-impermissible data in difference areas of the memory respectively.
CONSTITUTION: Data to which error control data such as a parity code has been appended by error control data appending circuit 3 are sent by the address signal of bus 1 from bus 2 to memory 4 and stored in different areas of memory 4 depending upon whether the data are allowed to include an error. The data are read out from memory 4 according to an address from bus 5 via error processing circuit 6 and reread via circuit 6 according to whether error detecting circuit 8 detects the existence of the error; when the read data are allowed to include the error, they are output to bus 11 as they are to take an adequate measure to the error corresponding to the kind of the error. In addition, error detection data from circuit 3 supplied with the data allowed to include the error are not stored in memory 4, so that the capacity of memory 4 can be reduced.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4700379A JPS55139698A (en) | 1979-04-17 | 1979-04-17 | Error processing system of memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4700379A JPS55139698A (en) | 1979-04-17 | 1979-04-17 | Error processing system of memory unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55139698A true JPS55139698A (en) | 1980-10-31 |
Family
ID=12762993
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4700379A Pending JPS55139698A (en) | 1979-04-17 | 1979-04-17 | Error processing system of memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55139698A (en) |
-
1979
- 1979-04-17 JP JP4700379A patent/JPS55139698A/en active Pending
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