JPS54158120A - Signal phase conversion device - Google Patents
Signal phase conversion deviceInfo
- Publication number
- JPS54158120A JPS54158120A JP6748878A JP6748878A JPS54158120A JP S54158120 A JPS54158120 A JP S54158120A JP 6748878 A JP6748878 A JP 6748878A JP 6748878 A JP6748878 A JP 6748878A JP S54158120 A JPS54158120 A JP S54158120A
- Authority
- JP
- Japan
- Prior art keywords
- memory unit
- main memory
- state
- digital information
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To secure is simple detection of occurrence of the outrunning by memorizing the display symbol showing the eriting or reading state at the main memory unit into the secondary memory unit.
CONSTITUTION: The clock signal relating the digital information signal is drawn out, and the digital information signals are written in sequence into the fixed addresses of the main memory unit based on the drawon-out clock signal. After this, the digital information signals are read out in sequence from the main memory unit via the reference clock signal. On the other hand, the display signal showing the writing state in synchronization with the writing action to the main memory unit is memorized into the secondary memory unit. At the same time, the display signal showing the reading state in synchronization with the reading action is memorized in the secondary memory unit. Then the outtunning state is detected for the writing or reading action to the main memory via the signals read out from the secondary memory unit.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6748878A JPS54158120A (en) | 1978-06-05 | 1978-06-05 | Signal phase conversion device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6748878A JPS54158120A (en) | 1978-06-05 | 1978-06-05 | Signal phase conversion device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54158120A true JPS54158120A (en) | 1979-12-13 |
JPS6160625B2 JPS6160625B2 (en) | 1986-12-22 |
Family
ID=13346405
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6748878A Granted JPS54158120A (en) | 1978-06-05 | 1978-06-05 | Signal phase conversion device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54158120A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61240726A (en) * | 1985-04-17 | 1986-10-27 | Nec Corp | Memory circuit device |
JPS63224538A (en) * | 1987-03-14 | 1988-09-19 | Fujitsu Ltd | Synchronizing control circuit |
-
1978
- 1978-06-05 JP JP6748878A patent/JPS54158120A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61240726A (en) * | 1985-04-17 | 1986-10-27 | Nec Corp | Memory circuit device |
JPS63224538A (en) * | 1987-03-14 | 1988-09-19 | Fujitsu Ltd | Synchronizing control circuit |
JPH0559623B2 (en) * | 1987-03-14 | 1993-08-31 | Fujitsu Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPS6160625B2 (en) | 1986-12-22 |
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