JPS5442923A - Buffer control system - Google Patents

Buffer control system

Info

Publication number
JPS5442923A
JPS5442923A JP10879777A JP10879777A JPS5442923A JP S5442923 A JPS5442923 A JP S5442923A JP 10879777 A JP10879777 A JP 10879777A JP 10879777 A JP10879777 A JP 10879777A JP S5442923 A JPS5442923 A JP S5442923A
Authority
JP
Japan
Prior art keywords
control system
buffer control
buffer
line
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10879777A
Other languages
Japanese (ja)
Inventor
Eiichi Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP10879777A priority Critical patent/JPS5442923A/en
Publication of JPS5442923A publication Critical patent/JPS5442923A/en
Pending legal-status Critical Current

Links

Landscapes

  • Image Input (AREA)
  • Storing Facsimile Image Data (AREA)

Abstract

PURPOSE: To secure highly flexible control for the line buffer through a simple constitution for the buffer control system which is usefl especially for the facsimile or the like, by memorizing the final address of one line in the ratch when writing and then utilizing the address when reading.
COPYRIGHT: (C)1979,JPO&Japio
JP10879777A 1977-09-12 1977-09-12 Buffer control system Pending JPS5442923A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10879777A JPS5442923A (en) 1977-09-12 1977-09-12 Buffer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10879777A JPS5442923A (en) 1977-09-12 1977-09-12 Buffer control system

Publications (1)

Publication Number Publication Date
JPS5442923A true JPS5442923A (en) 1979-04-05

Family

ID=14493718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10879777A Pending JPS5442923A (en) 1977-09-12 1977-09-12 Buffer control system

Country Status (1)

Country Link
JP (1) JPS5442923A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5876997A (en) * 1981-10-22 1983-05-10 テクトロニクス・インコ−ポレイテツド Signal measuring apparatus
JPS6274126A (en) * 1985-09-27 1987-04-04 Hitachi Ltd Delay stage number variable line buffer
JPS62142466A (en) * 1985-12-17 1987-06-25 Matsushita Graphic Commun Syst Inc Picture information processor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5876997A (en) * 1981-10-22 1983-05-10 テクトロニクス・インコ−ポレイテツド Signal measuring apparatus
JPS6274126A (en) * 1985-09-27 1987-04-04 Hitachi Ltd Delay stage number variable line buffer
JPS62142466A (en) * 1985-12-17 1987-06-25 Matsushita Graphic Commun Syst Inc Picture information processor
JPH0646766B2 (en) * 1985-12-17 1994-06-15 松下電送株式会社 Image information processing device

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