JPH0646766B2 - Image information processing device - Google Patents

Description

TECHNICAL FIELD The present invention relates to a case where the length of image information in an output section is longer than the length of image information in an input section, white information corresponding to the difference is input to the image in the input section. The present invention relates to an image information processing device added to information.

2. Description of the Related Art FIG. 3 is a schematic block diagram showing an example of a conventional image information processing apparatus.

In this image information processing apparatus, the A4 size image information input unit 2
The image information control unit 21 adds white information to the image information b2 input via 3 and outputs it to the B4 size image information output unit 24. In this case, in order to output the A4 size input in the B4 size, 160 bits of white information is added to both ends of the A4 size image information. This method will be further described with reference to FIG.

Image information b2 in which one line corresponds to the horizontal length of A4 size
Is input from the input unit 23 to the image information control unit 21,
The image information control unit 21 outputs the write address count control signal k2 at the fall of the input data enable a2, and starts the counting operation of the write address counter 37. The write address counter 37 outputs the write address signal m2 to the line memory 22 based on the count value.
Further, the image information control unit 21 temporarily stores the image information b2 in the line memory 22 while performing line management of the input image information b2 based on the write address signal m2.

When the image information b2 for one line is input to the image information control unit 21, the image information control unit 21 causes the output unit 24 to output the image information having the horizontal length of one line of B4 size. First, a 160-bit white addition counter (hereinafter abbreviated as a counter) 35 for counting white information added to the image information b2 is started. At the same time, the output data enable signal c2 is changed from H level to L level and output to the output unit 24. When the counter 35 counts over, the information is output as the count signal 12 to the image information controller 2.
Input to 1. At the same time, the read address count control signal 12 is output to the A4 size data output counter 36 and the read address counter 38 to start counting. The image information control unit 21 reads the read address signal n according to the count value of the read address counter 38.
Based on 2, the previously stored image information is taken out from the line memory 22 and is output after the white information. When the image information for the horizontal length of A4 size is output,
The counter 36 counts over, and the information is input to the image information control unit 21 and the counter 35. Then, the image information i2 is formed in a state where 160-bit white image information g2 is added to both ends of the image information h2 output from the image information control unit 21 and corresponding to the image information b2.
2 is sent to the output unit 24. In this case, the length of one line of the image information i2 is B4 size in total.

Thus, in the conventional image information processing apparatus, for example, A
160-bit white image information is added to both ends of 4 size image information to generate B4 size image information.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the above-described conventional image information processing apparatus, a counter is used and white information is added in correspondence with the count of the counter, so that the apparatus becomes complicated. There was a point.

The present invention has been made in view of the above problems, and an object of the present invention is to provide an image information processing apparatus that can add white information to image information with a simple configuration.

Means for Solving the Problems In order to achieve the above object, the present invention stores image information sent from an input unit according to an address, and can extract the stored image information by designating the address. Storage means, and an output portion that has a larger number of bits than the number of bits per line of the image information of the input portion and that outputs the image information extracted from the storage means to an external circuit. However, the white information having a bit number corresponding to the difference between the bit number per line of the image information of the input section and the bit number per line of the image information of the output section is stored in advance. And

For example, when A4 size image information is input and B4 size image information is output, A
16 at each of the positions corresponding to both ends of 4 size image information
0-bit white information is stored. And at the time of output,
A4 size image information is sandwiched between 160
Bit white information is output, and B4 size image information is also obtained.

Embodiment FIG. 1 is a schematic block diagram showing a facsimile apparatus according to an embodiment of the present invention, and FIG. 2 is a timing chart showing an example of the operation of the facsimile apparatus. In the present embodiment, the case where the input image information has the number of bits corresponding to the A4 size and the output image information has the number of bits corresponding to the B4 size will be described, but the present invention is not limited to this.

This facsimile apparatus has an input unit 1 for inputting A4 size image information and an image information d1 for inputting the image information input to the input unit 1.
As for the line memory 9 and the B4 size image information, which are stored according to the address output by the address counter 3 described later, and which can retrieve the image information stored at the corresponding address by receiving the designation of the address. And an output unit 13 for outputting the image information d1 fetched from the line memory 9 to an external circuit, and 160 at each end of the image information d1 stored in the line memory 9 corresponding to the difference between the B4 size and the A4 size. Bit white information is stored in advance. Further, this facsimile apparatus is provided with a control unit 10 to control the input unit 1, the line memory 9 and the output unit 13. An address counter 3 including a write address counter 31 and a read address counter 32 is connected to the control unit 10, and an address counter control signal h from the control unit 10 is connected.
When 1 is output, counting is started, and this count value is fed back to the control unit 10 as an address.

The operation of the facsimile apparatus configured as described above will be described below.

The controller 10 clears the line memory 9 by writing white data b1 corresponding to the clear enable a1 before writing the input data in the line memory 9.

Next, the image information d1 for one line of A4 size is written from the input unit 1 to the line memory 9. Upon writing the line (1728 bits) of the image information d1, the control unit 10 sends a preset setting signal 11 (this value is set to 160) to the write address counter 31. In response to the address signal output from the write address counter 31, the control unit 1
At 0, the image information d1 is written into the line memory 9 from the address 160 according to the input data enable c1.
In this way, white information of 160 bits is stored in advance at both ends of the image information d1.

Next, when outputting the image information d1 written in the line memory 9 to the output unit 13, the read address counter 32 is set to 0 in advance. That is, the line memory 9
The image information f1 is sequentially output to the output unit 13 in accordance with the output data enable e1 starting from the address 0. In addition,
As shown in FIG. 2, the image information f1 includes image information 200 indicating the image information d1 and 160-bit white information 100 added to both ends of the image information 200.

Then, the output data enable e1 is set to the H level by the count-up signal of the read address counter 32.

In other words, since the line memory 9 is cleared at the time of the initial setting, it is filled with white information. Here, the image information corresponding to one line input to the line memory 9 is written by the preset value of the write address counter 31 (in this embodiment, this value is set to 160). When the 2048-bit data corresponding to one line of the B4 size image information is read from the head of the line memory 9, the image information f1 as shown in FIG. 2 is output from the output unit 13. That is, the image information f1 has 160
It is 2048-bit image information including bit white information.

EFFECTS OF THE INVENTION As is clear from the above description, according to the present invention, the preset value of the write address counter is set by filling the line memory with white information in advance, and the image information is input to the line memory. With a simple configuration, white information can be added to image information and output.

[Brief description of drawings]

FIG. 1 is a schematic block diagram showing a facsimile apparatus according to an embodiment of the present invention, FIG. 2 is a timing chart showing an operation example of the facsimile apparatus, and FIG. 3 is a schematic block showing an example of a conventional image information processing apparatus. 4 and 5 are timing charts showing an operation example of the image processing apparatus. 1 ... input section, 3 ... address counter, 9 ... line memory, 10 ... control section, 13 ... output section.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takahiro Kikuchi 2-3-8 Shimo-Meguro, Meguro-ku, Tokyo Matsushita Dentsu Co., Ltd. (72) Inventor Toshio Narushima 2-3-3 Shimo-Meguro, Meguro-ku, Tokyo No. 8 Matsushita Dentsu Co., Ltd. (72) Inventor Hiroaki Nouchi 2-3-8 Shimomeguro, Meguro-ku, Tokyo Matsushita Dentsu Co., Ltd. (72) Toshiaki Shinano 2-3-8 Shimomeguro, Meguro-ku, Tokyo Matsushita Electric Transmission Co., Ltd.

Claims (1)

[Claims] 1. An input unit for inputting image information, a storage unit for storing the image information input to the input unit according to an address, and storing the image information by designating the address. The storage means has a number of bits that is larger than the number of bits per line of the image information of the input section, and outputs the image information fetched from the storage means to an external circuit. It is characterized in that white information having a number of bits corresponding to a difference between the number of bits per line of the image information of the input section and the number of bits per line of the image information of the output section is stored in advance. Image processing device.