JPS6029788A - Image memory writing circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to a graphic processing device such as a display device having the function of displaying a figure or a printing device having the function of printing a figure, and particularly relates to Shapes multiple bits (
The present invention relates to an image memory writing circuit that has an image memory that can write data in units of words (for example, units of words or hides) and units of focus, and that performs processing such as filling in figures written in the image memory at high speed.

(b) Prior Art and Problems In a graphic processing device having an image memory for storing a graphic to be displayed or printed, and a means for drawing a graphic in the image memory, conventionally, when writing a graphic to the image memory, bit If the figure is written in units and requires processing such as filling, unlike figures with many diagonal lines, the object to be written is a surface, so writing in units of focus will slow down the processing speed.

That is, since the image memory is generally a one-dimensional memory in which figures are written or read by rask scanning, processing speed can be improved by writing or reading horizontal lines and planes in units of words or in pie units. . However, graphics often have diagonal lines, and cannot be processed word by word or byte, and all data is written or read bit by bit. Therefore, processing such as filling that should be performed on a surface has a drawback that efficiency is reduced.

(C) Object of the Invention The object of the present invention is to eliminate the above-mentioned drawbacks. When writing a figure, the part written outside the memory boundary (the boundary on the memory that is accessed in units of words or bytes) on the image memory where the line segment representing the figure is stored is written in units of focus, The object of the present invention is to provide an image memory writing circuit that improves the speed of figure filling processing by writing the portion written within the memory boundary in units of words or units of hides.

(d) Structure of the Invention The structure of the present invention is an image memory writing circuit that simultaneously writes multiple bits to each figure in an image memory capable of writing figures in multiple focus units and -bit units. , a circuit for writing into the image memory in bit units, a circuit for writing in multiple focus units, means for determining whether the area of the figure is to be written in focus units or multiple bit units; It is provided with a switching circuit that selectively operates the circuit for writing in units of bits and the circuit for writing in units of plural bits/1 based on the determination result of the determining means.

(e) Embodiment of the invention FIG. 1 is a diagram for explaining the invention in detail. It is assumed that triangular image data 2 is stored in the image memory 1. The ranges a, b, and c of the image memory 1 indicated by dotted lines are the memory boundary ranges, and have, for example, 16-bit intervals in word units. Assuming that the screen scanning line 3 is currently scanning the image data 2, the period from the starting point f of the image data 2 until it reaches the memory boundary g of the image memory 1, that is, the image data 2 included in the range indicated by a. Since the amount of data is not enough for one word,
■You will be writing in focus. After reaching the memory boundary, that is, the range indicated by b is written in word units. Once within the range indicated by C, the amount of image data 2 is less than one word, so it must be written in bits. By repeating the above operations from point d to point e of image data 2, it is possible to completely fill in image data 2.

When filling in “1” for all cases and “1” for each coincidence
There is processing such as writing 1"0".

FIG. 2 is a block diagram of a circuit showing one embodiment of the present invention. The starting point address shown in FIG. and counter 6
The starting point address written in is sent to the image memory 1 as the writing start address of the image data 2. The lower 4 bits of the starting point address written to the counter 7 are used to detect memory boundaries.

The microprocessor 5 calculates the number of bits from the memory boundary to the start point of the image data 2 and sets the lower 4 bits. Therefore, if the value of the counter 7 is added every time one bit of data is written, the value of the counter 7 is When all the values become "1", it indicates that the address has reached the memory boundary of the image memory 1 shown in FIG. 1g. All counts of counter 7 are “1”
'', a carry signal is sent to the flip-flop 12.'Therefore, the flip-flop 12 is set to 1 by the carry signal.

The microprocessor 5 sends data to be written into the image memory 1 to a bit-by-bit write circuit 14 and a word-by-word write circuit 15. In the bit unit write circuit 14, the output of the NOT circuit 13 is a1'' until the flip-flop 12 is set.
Therefore, the write data instructed by the microprocessor 5 is sent to the image memory 1 one bit at a time, and is sequentially written one bit at a time from the write start address of the image memory I.

The word unit write circuit 15 does not operate because the output of the flip-flop 12 is "θ". As mentioned above, when the flip-flop 12 is sent, the output of the NOT circuit 13 becomes "0", so the bit-by-bit storing circuit 14 stops operating, and the word-by-word storing circuit 15 receives the data sent from the microprocessor 5. Sends the write data word by word to the image memory 1,
After the data written by the bit-by-bit write circuit 14, write data is sequentially written at word fli.

The microprocessor 5 starts from the first encountered memory boundary of the image memory 1 for each rask scan line as shown in FIG. 1g.
The length of the image data 2 of each rask scanning line up to the end point as shown in the first diagram, that is, the length from g to h, is divided into counters 8 and 9 and multiplied by seven times. The upper bits excluding the lower 4 bits are sent to the counter 8, and the lower 4 bits are sent to the counter 9. The counter 8 is used to detect the range in which each rask scanning line can be written into the image memory 1 word by word. The counter 8 is decremented each time the word unit positioning circuit 15 writes one word. When the values of the counter 8 are all 0'', the output of the OR circuit 10 is 0, so the NOT circuit 11
The output becomes "1" and resets the flip-flop 12. Therefore, the word unit position write circuit 15 stops and the output of the NOT circuit 13 becomes "'1", so the bit unit write circuit 14 becomes operational and writes the write data in 1 bit units to the word unit position of the image memory 1. Data is written following the data written by the circuit 15. 'Counter 9 has write data of 1
Subtract each time bit W is input. microprocessor 5
When the counter 9 reaches a total of 0, it is determined that data writing on the raster scanning line has been completed and the next operation is started.

(f) Detailed Description of the Invention As described above, the present invention switches between bit-by-bit 7F writing and multiple-unit writing, so that processing such as filling in figures can be performed at high speed.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the present invention in detail, and FIG. 2 is a block diagram of a circuit showing one embodiment of the present invention. 1 is image memory, 5 is microprocessor, 6°7.8
．． 9 is a counter, 12 is a Flinopf 1:1 knob, 14 is a focus unit writing circuit, and 15 is a word unit position writing circuit.

Claims (1)

[Claims] An image memory writing circuit that simultaneously writes multiple bits to an image memory capable of writing figures in units of multiple bits and units of -bits, the circuit writing to the image memory in units of focus. , a circuit for writing in units of multiple bits, a means for determining whether the area of the figure is to be written in units of bits or in units of multiple bits, and a circuit for writing in units of bits based on the determination result of this determining unit. An image memory write circuit comprising: a write circuit; and a switching circuit that selectively operates the write circuit in units of a plurality of bits.