JPS617769A - Image memory write control system - Google Patents

Abstract

PURPOSE:To write image data at high speed by controlling a write address depending on a run length value and writing the polarity of the run length value only as for a bit having a different polarity of an image memory initialized in advance. CONSTITUTION:A data inputted to a run length converter 1 is converted to a run length value and inputted to an adder 10. In this case, when the polarity of the initialized data of the image memory and that of the data bit are the same, either a Y address value (a value of an address register 7) or an X address value (a value of an address register 8) selected by a multiplexer 4 is added to the run length value and the result is outputted. Thus, the X address is updated by the run length of the image data. On the other hand, when the polarity of the output of the converter 1 is different from that of the initializing data of the image memory, the value of the address register is advanced by the run length value and the data is written in the image memory.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to data storage in an image memory in an image data processing device that is located between a host computer and an image data recording device and performs compression, expansion, editing, etc. of image data. This relates to control of writing.

[Conventional technology]

FIG. 4 is a diagram showing the connection relationship of the image data processing apparatus, in which 20 represents a host computer, 21 represents an image data processing apparatus, and 22 represents an image data recording apparatus. FIG. 5 is a block diagram showing a configuration example of an image data processing device, in which 23 is a microprocessor, 24 is an interface control section, 25 is a memory, 26 is a character control section, 27 is an expansion control section, and 28 is an image memory control section. Department,
29 represents a compression control section, and 30 represents an image memory.

Image data processing device 21 shown in FIGS. 4 and 5
The character data and image data received from the host computer 20 via the input interface control unit 24 are edited on the image memory 30, and this is re-inputted into the ink 7 process.
Processing such as sending the data to the image data recording device 22 via the space control unit 24 is performed.

[Problem that the invention seeks to solve]

In the image data processing device described above, dot information identical to the pattern of figures, characters, etc. to be recorded is written into the image memory. At this time, the ζ'° image memory control section writes data one bit at a time to the image memory, so there is a problem that the number of accesses is large and the processing takes a long time.

For example, the size of the image memory is 1 page of A4 size, approximately 500 bytes (1728 bits x 2286 pits) I
Therefore, the access time per bit is t”400n
If it is s, it will take about 1.6 seconds to write one screen data.

SUMMARY OF THE INVENTION In view of these conventional problems, it is an object of the present invention to provide a control method in which data can be written to an image memory in an image data processing device with fewer accesses and rapid processing can be expected.

[Means for solving problems]

According to the present invention, this object is achieved by an image data processing device that is located between a host computer and an image data recording device and performs data editing and data transfer, as described in the claims. means for converting data into run-length values; means for setting all bits in a corresponding area of image memory to all "o" t or all 1# as an initial value prior to writing data; and an address used for accessing the image memory. means for adding the run length value to the value of the register, and when writing image data to the image memory, the run length value related to the data is added without writing data having the same polarity as the initial value of the image memory. This is achieved by an image memory write control method characterized in that the value of the seat address register is updated and only the bits whose elasticity differs from the initial value of the image memory are written.

[For production]

As described above, the image memory write control method of the present invention sets all bits at a corresponding memory location to 0# or l# in advance before writing data, and writes only when the bits have a different polarity. This method reduces the number of accesses compared to the conventional case of writing all data pins, but in addition, if the data to be written has a large proportion of 0# as a whole, the initial value is 0''. Wow, if the ratio of l# is large, the initial value is l”
By using this, it is possible to significantly reduce the number of actual accesses to the image memory. A detailed explanation will be given below based on examples.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of the present invention,
1 is a run length converter, 2 to 4 are multiplexers, 5
8 represents an address register, 9 represents an image memory, 1o represents an adder, and 11 represents a mode register.

The run-length converter 1 converts image data into run-length data, and an example of the data conversion is shown in FIG. In FIG. 2, 12 is image data, 13
represents a run length converter, and 14 represents run length data. That is, the image data 12 is processed one byte at a time in the direction of the arrow from the beginning (top left of the figure), and as shown in run-length data 14, 3 white and 1 black are processed in the direction of the arrow.
, white 2...... is converted as ("o"
corresponds to white and 'l'' corresponds to black).This gin length converter can be realized, for example, with a configuration as shown in the block diagram shown in Fig. 3. In Fig. 3, 15 indicates data. Conversion ROM, 16 is a counter, 17 is an adder, 1
8.19.19' indicates a register, and the 1-byte image data input to the data conversion ROM 15 is read from the first bit and the number of bits until the polarity of the bit changes is expressed as a run length value in binary numbers. Output. When processing of 1 byte of image data is completed, +E
The counter 16 is reset by the ND signal, but
The previously output run length value is held in register 19, and the current polarity (either white or black) is also held in register 18. Then, when processing of the next 1 byte of image data is started, if the polarity of the data is the same as that held in register 18, the value held in register 19 is added to the output of the data conversion ROM. It is a run length value.

The run-length converter has been described in detail above, and its entire operation will be explained again based on FIG. 1. Prior to writing data, the image memory 9 is initialized. In other words, by setting address registers 5 (Y address) and 6 (X address) K start address and writing "0" or "1", all bits are set to "0" or "1".
Make it. Whether all bits are set to 601 or 1# is determined by the state of the data to be written. Usually, if the data to be written after that has many white (0#) parts, o"t, t If there are many black (1') parts, specify "11".

Subsequently, when initial addresses of data to be written to the image memory are set in address registers 5 and 6, these are set in address registers 7 (Y address) and 8 (X address) via multiplexer 2 or 3.

On the other hand, data input to the run length converter 1 is converted into a run length value and input to the adder 10. At this time, if the polarity of the initialization data of the image memory and the data bit are the same, either the Y address value (value of address register 7) or the X address value (value of address register 8) selected by multiplexer 4 is selected. The run length value is added and output. Which address value is selected by the multiplexer 4 is specified by the contents of the mode register 11 (horizontal writing (X direction scan))
Or vertical writing (Y direction scan) depends on the crab.

For example, in the case of horizontal writing, the 5ELX signal becomes "1#" and multiplexer 4 selects the value of address register 8 (X address), so this and the run length value are added and sent to the address register via multiplexer 3. 8. This updates the X address by the run length value of the image data. If the polarity of the output of the run length converter 1 is different from the initialization data of the image memory, the Increment the address register value by the length part and write all data to the image memory.

〔Effect of the invention〕

As described above in detail, according to the method of the present invention, data in the run length portion is written only for bits that differ from the polarity of the image memory initialized in advance by controlling the write address using the image data run length value. Since there is no need to write bits with the same polarity as the initial value of the image memory, the number of accesses when writing image data to the image memory is small, and high-speed processing can be expected, which is highly effective.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a diagram showing an example of data conversion of a run-length converter, FIG. 3 is a block diagram showing an example of the configuration of the run-length converter, and FIG.
The figure shows the connection relationship of the image data processing device.
FIG. 5 is a block diagram showing an example of the configuration of an image data processing device. 1.13...Run length converter, 2-4...
...Multiplexer, 5 to 8 ... Address register, 9 ... Image memory, 10.17
...Adder, 11...Mode register, 12...Image data, 14...
Run length data, 15...Data conversion RO
M, 16... Counter, 18.19.1
9'...Register, 20...Host calculation a21...Image data processing device, 22
...Image data recording device, 23...
-Microprocessor, 24...Interface control unit 25 -=-Memory, 26...Character control unit 27...Expansion control unit, 28...
Image memory control unit 29...Compression control unit,
30... Image memory 2 Figure 3 Figure 4

Claims (1)

[Claims] In an image data processing device that is located between a host computer and an image data recording device and performs data editing and data transfer, there is a means for converting image data into a run length value, and a means for converting image data into a run length value, and an image data processing device that is located between a host computer and an image data recording device and performs data editing and data transfer. All bits in the relevant area of memory are set to “0”
Alternatively, means for setting all "1" and means for adding the run length value to the value of the address register used for accessing the image memory are provided, and when writing image data to the image memory, the run length value is set to "1", and when writing the image data to the image memory, the value is the same as the initial value of the image memory. An image memory write control method characterized in that the value of the address register is updated by adding the run length value related to the polarity data without writing it, and only the bits of polarity different from the initial value of the image memory are written. .