JPS5664581A - Character broadcast receiver - Google Patents

Character broadcast receiver

Info

Publication number
JPS5664581A
JPS5664581A JP13991879A JP13991879A JPS5664581A JP S5664581 A JPS5664581 A JP S5664581A JP 13991879 A JP13991879 A JP 13991879A JP 13991879 A JP13991879 A JP 13991879A JP S5664581 A JPS5664581 A JP S5664581A
Authority
JP
Japan
Prior art keywords
memory
cpu10
supplied
circuit
broadcast receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13991879A
Other languages
Japanese (ja)
Other versions
JPS6243591B2 (en
Inventor
Toyotaro Nishihara
Masutomi Oota
Kiyoshi Hiramatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13991879A priority Critical patent/JPS5664581A/en
Publication of JPS5664581A publication Critical patent/JPS5664581A/en
Publication of JPS6243591B2 publication Critical patent/JPS6243591B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame

Abstract

PURPOSE:To realize a reduction not only for the cost and the power consumption of a character broadcast receiver, by using the blank memory region part of a display memory as the buffer memory. CONSTITUTION:The gate signal obtained through the gate generating circuit 4 is supplied to the timing circuit 17 to secure a synchronization with the clock different from the information data fetching clock of the CPU10. Such gate signal is supplied to the holding terminal of the CPU10 to stop the operation of the CPU10. At the same time, the information data which has received a parallel conversion by the parallel converting circuit 6 is supplied to the data bus 14 via the buffer circuit 16, and also the output of the address counter circuit 7 which delivers the address of the blank memory region part of the display memory 12 is supplied to the address bus 13 via the buffer circuit 15. In such constitution, the operation of the CPU10 is stopped for the period of the 20th line in which the information data are accumulated plus the 283rd line. Thus the blank of the memory 12 is used for the buffer memory to realize a reduction for both the cost and the power consumption of a character broadcast receiver.
JP13991879A 1979-10-31 1979-10-31 Character broadcast receiver Granted JPS5664581A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13991879A JPS5664581A (en) 1979-10-31 1979-10-31 Character broadcast receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13991879A JPS5664581A (en) 1979-10-31 1979-10-31 Character broadcast receiver

Publications (2)

Publication Number Publication Date
JPS5664581A true JPS5664581A (en) 1981-06-01
JPS6243591B2 JPS6243591B2 (en) 1987-09-16

Family

ID=15256675

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13991879A Granted JPS5664581A (en) 1979-10-31 1979-10-31 Character broadcast receiver

Country Status (1)

Country Link
JP (1) JPS5664581A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5424532A (en) * 1977-07-27 1979-02-23 Hitachi Ltd Reception unit for still picture signal
JPS5434619A (en) * 1977-08-22 1979-03-14 Matsushita Electric Ind Co Ltd Character picture receiving device
JPS54114036A (en) * 1978-02-25 1979-09-05 Matsushita Electric Ind Co Ltd Display unit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5424532A (en) * 1977-07-27 1979-02-23 Hitachi Ltd Reception unit for still picture signal
JPS5434619A (en) * 1977-08-22 1979-03-14 Matsushita Electric Ind Co Ltd Character picture receiving device
JPS54114036A (en) * 1978-02-25 1979-09-05 Matsushita Electric Ind Co Ltd Display unit

Also Published As

Publication number Publication date
JPS6243591B2 (en) 1987-09-16

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