JPS5746588A - Television receiver - Google Patents

Television receiver

Info

Publication number
JPS5746588A
JPS5746588A JP55122803A JP12280380A JPS5746588A JP S5746588 A JPS5746588 A JP S5746588A JP 55122803 A JP55122803 A JP 55122803A JP 12280380 A JP12280380 A JP 12280380A JP S5746588 A JPS5746588 A JP S5746588A
Authority
JP
Japan
Prior art keywords
memory
data
supplied
gate
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55122803A
Other languages
Japanese (ja)
Inventor
Satoru Maeda
Hisao Mogi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP55122803A priority Critical patent/JPS5746588A/en
Publication of JPS5746588A publication Critical patent/JPS5746588A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division
    • H04N7/087—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only
    • H04N7/088—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital
    • H04N7/0882—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital for the transmission of character code signals, e.g. for teletext

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To reduce the burden of a CPU, by disconnecting a memory from a data bus and an address bus when character data is written in the memory in case of receiving of various information which are broadcasted by utilizing the vertical blanking period. CONSTITUTION:The pulse from a counter 43 is supplied to a switching gate 48 as a control signal, and a gate circuit 32 is connected to a memory 33 through the switching gate 48 in the horizontal period when data of character broadcasting is transmitted, and a data bus 24 is connected to the memory 33 through the switching gate 48 in the other horizontal period. The pulse from the counter 43 is supplied to a CPU21 as an interruption signal. Consequently, in the horizontal period when data of character broadcasting is transmitted, the output of the counter 43 is supplied to the memory 33 through the gate 46 as an address signal to designate an address, and data from a register 31 is supplied to the memory through the gate circuit 32 and the switching gate 48 by DMA and is written in.
JP55122803A 1980-09-04 1980-09-04 Television receiver Pending JPS5746588A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55122803A JPS5746588A (en) 1980-09-04 1980-09-04 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55122803A JPS5746588A (en) 1980-09-04 1980-09-04 Television receiver

Publications (1)

Publication Number Publication Date
JPS5746588A true JPS5746588A (en) 1982-03-17

Family

ID=14845016

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55122803A Pending JPS5746588A (en) 1980-09-04 1980-09-04 Television receiver

Country Status (1)

Country Link
JP (1) JPS5746588A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58194482A (en) * 1982-05-08 1983-11-12 Sony Corp Character broadcast receiver
JPH03143636A (en) * 1989-10-31 1991-06-19 Toppan Printing Co Ltd Card transfer device
JPH0366744U (en) * 1989-10-31 1991-06-28
JPH05293949A (en) * 1991-03-20 1993-11-09 Nippon Data Kaade Kk Card tippering method and apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58194482A (en) * 1982-05-08 1983-11-12 Sony Corp Character broadcast receiver
JPH0415676B2 (en) * 1982-05-08 1992-03-18 Sony Corp
JPH03143636A (en) * 1989-10-31 1991-06-19 Toppan Printing Co Ltd Card transfer device
JPH0366744U (en) * 1989-10-31 1991-06-28
JPH05293949A (en) * 1991-03-20 1993-11-09 Nippon Data Kaade Kk Card tippering method and apparatus

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