JPS5662341A - Formation of bump electrode - Google Patents

Formation of bump electrode

Info

Publication number
JPS5662341A
JPS5662341A JP13763379A JP13763379A JPS5662341A JP S5662341 A JPS5662341 A JP S5662341A JP 13763379 A JP13763379 A JP 13763379A JP 13763379 A JP13763379 A JP 13763379A JP S5662341 A JPS5662341 A JP S5662341A
Authority
JP
Japan
Prior art keywords
layer
solder
film
plating
removal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13763379A
Other languages
Japanese (ja)
Inventor
Toru Kawanobe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13763379A priority Critical patent/JPS5662341A/en
Publication of JPS5662341A publication Critical patent/JPS5662341A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To make the layer of a solder plating relatively thin by selectively plating the solder with an unwetted Ti layer exposed surrounding a Cu layer adapted to be wet with the solder in a nearly even width. CONSTITUTION:The first protective SiO2 film is formed on the surface of a substrate 10 and then, a section 12 intended for a lump electrode in an Al wiring layer and a phosphosilicic acid glass film 13 as the second protective film are formed. A Ti layer 14 left unwetted with a solder is deposited over the entire film, and then, a Cu layer adapted to be wet therewith is entirly thereover, followed by removal of an unnecessary portion from the Cu layer 15 by photoetching. Then, a solder layer 17A is formed as broadly as possible from the exposed portion of the Cu layer 15 by a selective electric plating and after the removal of a photoresist film 16, the solder layer 17A is melted by heat to form a solder bump electrode 17.
JP13763379A 1979-10-26 1979-10-26 Formation of bump electrode Pending JPS5662341A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13763379A JPS5662341A (en) 1979-10-26 1979-10-26 Formation of bump electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13763379A JPS5662341A (en) 1979-10-26 1979-10-26 Formation of bump electrode

Publications (1)

Publication Number Publication Date
JPS5662341A true JPS5662341A (en) 1981-05-28

Family

ID=15203198

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13763379A Pending JPS5662341A (en) 1979-10-26 1979-10-26 Formation of bump electrode

Country Status (1)

Country Link
JP (1) JPS5662341A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196548A (en) * 1981-05-28 1982-12-02 Toshiba Corp Plastic chip carrier
JPH04352429A (en) * 1991-05-30 1992-12-07 Sharp Corp Forming method for solder bump

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196548A (en) * 1981-05-28 1982-12-02 Toshiba Corp Plastic chip carrier
JPH04352429A (en) * 1991-05-30 1992-12-07 Sharp Corp Forming method for solder bump

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