JPS5650552A - Manufacture of hybrid integrated circuit device - Google Patents

Manufacture of hybrid integrated circuit device

Info

Publication number
JPS5650552A
JPS5650552A JP12760479A JP12760479A JPS5650552A JP S5650552 A JPS5650552 A JP S5650552A JP 12760479 A JP12760479 A JP 12760479A JP 12760479 A JP12760479 A JP 12760479A JP S5650552 A JPS5650552 A JP S5650552A
Authority
JP
Japan
Prior art keywords
substrate
integrated circuit
hybrid integrated
trimming
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12760479A
Other languages
Japanese (ja)
Inventor
Masaaki Fuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12760479A priority Critical patent/JPS5650552A/en
Publication of JPS5650552A publication Critical patent/JPS5650552A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/707Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To reduce the number of steps of working such as setting of a substrate at a trimming machine by continuously conducting the step of trimming in adjusting a circuit characteristics of a hybrid integrated circuit device from the step of trimming resistors and capacitors. CONSTITUTION:A circuit having a gold thin film conductor 2, a tantalum nitride thin film resistor 3, and a tantalum thin film capacitor 4 is formed on a ceramic substrate 1, the latter is set by a laser trimming machine 7, and the resistor 3 and the capacitor 4 are trimmed by the machine 7. Then, a semiconductor chip 5 is electrically connected to the above circuit, the circuit characteristics is measured in this state, and the resistor 3 or the capacitor 4 is trimmed to obtain desired characteristics. Thereafter, the chip 5 and an external terminal are bonded onto the substrate 1, thereby producing a hybrid integrated circuit device. This can reduce the number of steps of working such as setting of the substrate at the trimming machine, positioning, and removing of the substrate.
JP12760479A 1979-10-02 1979-10-02 Manufacture of hybrid integrated circuit device Pending JPS5650552A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12760479A JPS5650552A (en) 1979-10-02 1979-10-02 Manufacture of hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12760479A JPS5650552A (en) 1979-10-02 1979-10-02 Manufacture of hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5650552A true JPS5650552A (en) 1981-05-07

Family

ID=14964187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12760479A Pending JPS5650552A (en) 1979-10-02 1979-10-02 Manufacture of hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5650552A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59151855A (en) * 1983-02-16 1984-08-30 Arai Shokuhin Kk Processing of garlic
JPS6150356A (en) * 1984-08-20 1986-03-12 Sony Corp Adjustment for impedance of impedance parts

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59151855A (en) * 1983-02-16 1984-08-30 Arai Shokuhin Kk Processing of garlic
JPS6150356A (en) * 1984-08-20 1986-03-12 Sony Corp Adjustment for impedance of impedance parts

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