JPS60158651A - Manufacture of hybrid integrated circuit - Google Patents

Abstract

PURPOSE:To enable to trim the resistance element of a hybrid integrated circuit without hindering the higher integration and miniaturization of the hybrid integrated circuit device by a method wherein the mounting pads or probe pads of chip parts, whereto the resistance element has been connected, are utilized as pads for probes at a time when the resistance element is trimmed while the resistance value of the resistance element is measured. CONSTITUTION:Conductor patterns 1-5 are respectively provided with each of mounting pads 1a-5a. Firstly, the conductor patterns 1-5 as well as a resistance element 6 are respectively formed in a thick film or a thin film in a condition that the mounting pads 4a and 5a of chip parts 7 and 8, which must not be connected to the mounting pads 1a and 2a of the resistance element 6 from the viewpoint of the circuit diagram, have been shorted to the mounting pads 1a and 2a of the resistance element 6 by conductor patterns 10 and 11. The probes 12 and 13 of a resistance measuring instrument are connected to the mounting pads 4a and 5a of the chip parts 7 and 8 and the resistance element 6 is trimmed using a laser beam and so forth until the resistance value thereof reaches a prescribed resistance value while the resistance value of the resistance element 6 is measured. After the trimming ended, the probes 12 and 13 are removed and the conductor patterns 10 and 11 are cut off.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a hybrid integrated circuit, and more particularly to a method of manufacturing a circuit for a resistive element included in a hybrid integrated circuit.

In general, hybrid integrated circuits form electronic circuits by attaching semiconductor components and passive components to an insulating substrate made of glass or ceramic. The general form of such hybrid integrated circuits is to fabricate conductors and resistors on ceramic substrates using thick film printing techniques or thin film techniques such as vacuum evaporation or sputtering to create monolithic ICs.
There are bare chips such as single transistors, or those with ultra-small packaged parts and capacitor chips attached and placed in a suitable package. In such a hybrid integrated circuit, a resistor made of a thick film or a thin film is adjusted by trimming while measuring the resistance value to obtain a predetermined resistance value, but due to the structure of the conductor pattern, the resistor elements are arranged in columns. Both ends or one side of the device may not be connected to the mounting pad of another device.

In such cases, conventionally, a conductor pattern having a required area was specially provided on both ends or one side of the resistance element as a probe pad for contacting a measurement terminal (probe) of a resistance measuring device. In this way, the provision of unnecessary conductor patterns for circuit functions has the drawback of impeding the high integration and miniaturization that are the greatest features of hybrid integrated circuits.

An object of the present invention is to provide a method for manufacturing a hybrid integrated circuit that enables trimming of resistive elements mounted on the circuit without impairing the high integration and miniaturization that are the features of the hybrid integrated circuit. be.

The method for manufacturing a hybrid integrated circuit according to the present invention is, in a hybrid integrated circuit in which both ends or one side of a resistor element are not connected to the mount pad of another chip, both ends or one side of the resistor element are connected to the mount pad or probe pad of another chip. After connecting the pads and using the pads as probe pads for resistor trimming, the pattern connected to the pads of the other chip is cut out.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a plan view showing a part of the pattern of a hybrid integrated circuit to be manufactured, in which 1 to 5 are conductor patterns, la to 5a are mounting pads provided on conductor patterns 1 to 5, respectively. , various elements such as a resistance element 6 and chip components 7 and 8 are mounted on these mounting pads la to 5a. Generally, these hybrid integrated circuits are manufactured by forming the conductive patterns 1 to 6 and the resistive element 6 by thick film printing and firing them, or by making the conductive patterns 1 to 5 and the resistive element 6 by using a thin film by vacuum evaporation or sputtering, and then
Trimming the resistance element 6 to a desired resistance value,
Thereafter, chip components 7 and 8 are mounted on other mounting pads 3ax4a and 5a. In order to trim the resistance element 6, the mounting pads 1a and 2a of the resistance element 6 need to have an area large enough to allow the measurement terminal (probe) of the resistance measuring device to come into contact with them. however,
In the circuit shown in FIG. 1, if the mount pads 1a and 2a of the resistor element 6 are not connected to the mount pads 4a and 5a of the circuit function 1 and other various elements, respectively, the mount pads lak and 2a of the resistor element 6 are connected. The area of 2a alone is too small to allow the probe of the resistance measuring device to come into contact with it. In such a case, conventionally, a pad for contacting the probe of a resistance measuring device, that is, a probe pad, is provided integrally or connected to the mounting pads 1a and 2a of the resistance element 6, or there is no space to provide this probe pad. In some cases, probe pads were provided after increasing the integration rate. In the present invention, the first
When trying to obtain a conductor pattern as shown in the figure, the second
As shown in the figure, first, mount pad 1a of resistor element 6 is
And 2a, the mounting pads 4a and 5a of the chip components 7 and 8, which should not be connected in the circuit diagram, are short-circuited by the conductor patterns 1o and 11. Alternatively, it is formed using a thin film. Next, the thick film is fired in a conventional manner, and then chip parts 7 and 8 are formed as shown in FIG.
Probes 12 and 13 of a resistance measuring device (not shown) are attached to the mounting pads 4a and 5a (indicated by black circles in the figure).

), and while measuring the resistance value of the resistance element 6, trim the resistance element 6 using a known laser beam or the like until it reaches a predetermined resistance value. After trimming, remove the probes 12 and 13 and remove the shorted conductor 10.
and 11 can be appropriately removed to obtain conductor patterns 1 to 5 that satisfy the circuit diagram. After this, the other chip components 7 and 8 are mounted on the P mount pads 3a14a and 5a by soldering, bonding, etc., respectively, without changing the assembly process of a normal hybrid integrated circuit, and the hybrid integrated circuit device is completed. can be done.

As explained above, according to the method of manufacturing a hybrid integrated circuit according to the present invention, in a hybrid integrated circuit in which both ends or one side of a resistance element are not connected to the mounting pad of another chip, the probe pad used when trimming the resistance element is specially set. Since there is no need to provide a resistor element in the resistor element, the resistor element can be trimmed without impairing the high integration and miniaturization that are the features of hybrid integrated circuits.

[Brief Description of the Drawings] Fig. 1 is a plan view showing a part of a pattern of a hybrid integrated circuit to be manufactured, and Fig. 2 is an example of a pattern created by the method of manufacturing a hybrid integrated circuit of the present invention. Flat F showing
Ii diagram, m3v! J is an explanatory diagram when trimming a resistive element using the pattern shown in FIG. 2; 1-5... Conductor pattern, 6... Resistance element, 7.8
...Chip parts, la-5a...Mount pad,
10-11...Four body pattern for short circuit patent applicant Nippon Avionics Hayashi Shiki Co., Ltd.

Claims (1)

[Claims] In a hybrid integrated circuit in which both ends or one side of the resistor element are not connected to the mounting pads of other chips, both ends or one side of the resistor element are connected to the mount pads or probe pads of the other chip, and the pads are connected to the resistor trimmer/probe pad. 1. A method of manufacturing a hybrid integrated circuit, comprising cutting out a pattern connected to a pad of the other chip after being used as a probe pad during programming.