JPH03123096A - Manufacture and structure of hybrid ic - Google Patents
Manufacture and structure of hybrid icInfo
- Publication number
- JPH03123096A JPH03123096A JP25875689A JP25875689A JPH03123096A JP H03123096 A JPH03123096 A JP H03123096A JP 25875689 A JP25875689 A JP 25875689A JP 25875689 A JP25875689 A JP 25875689A JP H03123096 A JPH03123096 A JP H03123096A
- Authority
- JP
- Japan
- Prior art keywords
- hybrid
- terminal
- slit
- board
- land
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000004020 conductor Substances 0.000 claims description 8
- 238000005476 soldering Methods 0.000 abstract description 9
- 239000000758 substrate Substances 0.000 abstract description 4
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract 2
- 239000003990 capacitor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 3
- 239000006071 cream Substances 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 210000002257 embryonic structure Anatomy 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- -1 resistors Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3415—Surface mounted components on both sides of the substrate or combined with lead-in-hole components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
Landscapes
- Manufacturing Of Electrical Connectors (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
本発明はスリット幅を端子の所望長さにしさらに該スリ
ットを挟んで対向するハイブリッドIC基板の端子ラン
ドに端子を装入する対向穴を穿設し、部品ランドに電子
部品およびICを固定するとともに該対向穴に導線を固
定するハイブリッドICの製造方法であって、端子価格
を低廉にし、製造工程を簡略化し、ハイブリッドICの
高さを低くすることができる。[Detailed Description of the Invention] [Summary] The present invention involves making the slit width the desired length of the terminal, and further drilling an opposing hole into which the terminal is inserted into the terminal land of the hybrid IC board facing across the slit. A method for manufacturing a hybrid IC in which electronic components and ICs are fixed to a component land and conductive wires are fixed to the opposing hole, which reduces the terminal price, simplifies the manufacturing process, and reduces the height of the hybrid IC. can.
本発明はあらゆる電子部品(半導体、抵抗、コンデサ、
コイル等)とICとを合成した一種のICであるハイブ
リッドICに関する。The present invention applies to all electronic components (semiconductors, resistors, capacitors,
The present invention relates to a hybrid IC, which is a type of IC that combines a coil, etc.) and an IC.
(1)
(2)
ハイブリッドICは多数の部品を用い、複雑な電子回路
を構成する通信機、コンピュータなどに用いられ、これ
ら装置の小形化、高安定性、高品質、低価格を実現化す
ることに必要とされる。(1) (2) Hybrid ICs are used in communication devices, computers, etc. that use a large number of components to form complex electronic circuits, and make these devices smaller, more stable, higher quality, and lower priced. Especially needed.
本発明では特にハイブリッドICの構造に言及する。The present invention particularly refers to the structure of a hybrid IC.
第7図は従来の複数のハイブリッドIC基板からなるプ
リント基板を示す平面図である。以下に本図の構成を説
明する。なお全図を通じて同様の構成要素については同
一参照番号または記号をもって表す。本図においてプリ
ント基板1はガラスエポキシ樹脂基材からなるプリント
配線板である。FIG. 7 is a plan view showing a conventional printed circuit board made up of a plurality of hybrid IC boards. The configuration of this figure will be explained below. Note that similar components are represented by the same reference numbers or symbols throughout the drawings. In this figure, a printed circuit board 1 is a printed wiring board made of a glass epoxy resin base material.
プリント基板1は例えばそれぞれに配線(図示しない)
、電子部品が搭載される部品ランド3およびその長平方
向の片側に位置する端子ランド4が印刷され、さらに4
列2段に配列される8個のハイブリッドIC基板2、該
ハイブリッドIC基板2の相互および側縁板(17、1
8)から分離させ、プリント基板1からの分割を容易に
するため各該ハイブリッドIC基板2の長平方向に設け
られる4本のスリット6ならびに上部縁板(15)およ
び下部縁板(16)を切り離し、上段および下段のハイ
ブリッドIC基板を切り離してプリント基板1から分割
するために各該ハイブリッドIC基板2の横手方向に設
けられるV字形状の溝を有する3本の分割線(例えばV
カット線あるいはミシン孔以下Vカット線をもって説明
する)5を含む。第8図は第7図の斜線部のハイブリッ
ドICを示す平面図である。本図において、ハイブリッ
ドIC2はハイブリッドIC基板2、該ハイブリッド基
板2に搭載されるICl0、トランジスタ11、抵抗1
2、コンデンサ13等の電子部品、および端子ランド4
に固定される端子7を含む。第9図は第8図の側面図で
ある。本図において、ハイブリッドIC2’の端子7は
一端の先端が二叉の構造になって、ハイブリッドIC基
板2の端子ランド4を挾む。第8図において端子7の長
さaは約5胚であり、端子7の先端の二叉構造の肩部か
ら挿着時のバイブ(3)
(4)
リッドIC基板2の縁までの肩部高さbは1.3+n+
n〜1.7 +n+nである。For example, the printed circuit board 1 has wiring (not shown)
, a component land 3 on which an electronic component is mounted and a terminal land 4 located on one side in the elongated direction are printed;
Eight hybrid IC boards 2 are arranged in two rows, and the hybrid IC boards 2 are connected to each other and side edge plates (17, 1
8) and cut off the four slits 6 provided in the longitudinal direction of each hybrid IC board 2, the upper edge plate (15), and the lower edge plate (16) to facilitate separation from the printed circuit board 1. In order to separate the upper and lower hybrid IC boards from the printed circuit board 1, three parting lines having V-shaped grooves (for example, V
(Explained using a cut line or a V cut line below the perforation hole) 5. FIG. 8 is a plan view showing the hybrid IC in the shaded area in FIG. 7. In this figure, the hybrid IC 2 includes a hybrid IC board 2, an ICl0 mounted on the hybrid board 2, a transistor 11, and a resistor 1.
2. Electronic components such as capacitor 13, and terminal land 4
It includes a terminal 7 fixed to. FIG. 9 is a side view of FIG. 8. In this figure, one end of the terminal 7 of the hybrid IC 2' has a bifurcated structure, and the terminal land 4 of the hybrid IC board 2 is sandwiched between the terminals 7 of the hybrid IC 2'. In FIG. 8, the length a of the terminal 7 is about 5 embryos, and the shoulder part from the shoulder of the forked structure at the tip of the terminal 7 to the edge of the vibrator (3) (4) lid IC board 2 at the time of insertion. Height b is 1.3+n+
n~1.7 +n+n.
次にハイブリッドIC2’を製造する工程を説明する。Next, the process of manufacturing the hybrid IC 2' will be explained.
第10図は従来のハイブリッドICの製造フローチャー
トである。本図において、プリント基板1のハイブリッ
ドIC基板2には配線(図示しない)、部品ランド3お
よび端子ランド4が印刷され、回路パターンが形成され
る(Sl)。プリント基板1にVカット線5およびスリ
ット線6が加工される(S2)。ハイブリッドIC基板
2の部品ランド3にはんだクリームが例えばスクリーン
印刷またはデイスペンサにより塗布される(S3)。ハ
イブリッドIC基板2の部品ランド3にICl0、トラ
ンジスタ11、抵抗12、コンデンサ13等の電子部品
を装着する(S4)。リフローはんだ方式による加熱溶
融によりこれらの電子部品を固定する(S5)。次にV
カット線5に沿ってプリント基板1を各ハイブリッドI
C基板2へ分割する(S6)。分割された各該ハイブリ
ッドIC基板2の端子ランド4に端子7を挿入してはん
だ付けしてハイブリッドIC2’を完成させる(S7)
。その後はんだ付けによるフラックス残さの洗浄および
防湿のための表面コーティングが行われるが本発明とは
直接関連を有しない。かくしてこれらのハイブリッドI
C2’は電子機器に組込まれ(S8)、電子機器の小形
化、高品質に寄与してきた。FIG. 10 is a manufacturing flowchart of a conventional hybrid IC. In this figure, wiring (not shown), component lands 3, and terminal lands 4 are printed on a hybrid IC board 2 of a printed circuit board 1 to form a circuit pattern (Sl). V-cut lines 5 and slit lines 6 are processed on the printed circuit board 1 (S2). Solder cream is applied to the component lands 3 of the hybrid IC board 2 by, for example, screen printing or a dispenser (S3). Electronic components such as the ICl0, transistor 11, resistor 12, and capacitor 13 are mounted on the component land 3 of the hybrid IC board 2 (S4). These electronic components are fixed by heating and melting using a reflow soldering method (S5). Next V
Cut the printed circuit board 1 along the cut line 5 into each hybrid I.
Divide into C substrates 2 (S6). The terminals 7 are inserted into the terminal lands 4 of each divided hybrid IC board 2 and soldered to complete the hybrid IC 2' (S7).
. Thereafter, cleaning of flux residue caused by soldering and surface coating for moisture proofing are performed, but these are not directly related to the present invention. Thus these hybrid I
C2' has been incorporated into electronic equipment (S8) and has contributed to the miniaturization and high quality of electronic equipment.
しかしながらハイブリッドIC基板2への端子7の挿入
、はんだ付けに専用の設備が必要でさらにICl0等の
電子部品のはんだ付けとは別に端子のはんだ付けを行う
ため製造工程が複雑であるという第1の問題がある。However, the first problem is that special equipment is required for inserting and soldering the terminals 7 into the hybrid IC board 2, and the manufacturing process is complicated because the terminals are soldered separately from the soldering of electronic components such as ICl0. There's a problem.
また端子7自体は二叉構造へ加工する必要があるため高
価になるという問題がある。一端子あたり0.5円〜1
.5円の費用を必要とする。Further, since the terminal 7 itself needs to be processed into a bifurcated structure, there is a problem that it becomes expensive. 0.5 yen to 1 per terminal
.. A fee of 5 yen is required.
さらに端子7は第8図に示すようにその先端を二叉構造
にするため、その肩部高さb(1,3mm〜1.7m+
n)により、ハイブリッドIC2’の電子機器(5)
(6)
への取り付は高さh ′を大きくするという第3の問題
がある。車載用デツキの場合には、その高さが約10+
nmに制限されるので端子7の先端における肩部高さb
は無視できないほど大である。Furthermore, since the terminal 7 has a bifurcated tip as shown in Fig. 8, its shoulder height b (1.3 mm to 1.7 m +
Due to n), there is a third problem in that mounting the hybrid IC 2' to the electronic equipment (5) (6) increases the height h'. In the case of an in-vehicle deck, the height is approximately 10+
Since it is limited to nm, the shoulder height b at the tip of terminal 7
is too large to be ignored.
したがって、本発明は上記問題点に鑑み、製造工程が簡
略でき、低価格でかつ電子機器を小形化にするハイブリ
ッドICを提供することを目的とする。Therefore, in view of the above-mentioned problems, it is an object of the present invention to provide a hybrid IC that can simplify the manufacturing process, is inexpensive, and allows electronic equipment to be miniaturized.
第1図は本発明の原理構成を示す図である。本発明では
前記問題点を解決するためにスリット60幅を端子の所
望長さのほぼ2倍にし、さらに該スリット6 ′を挟ん
で対向するハイブリッドIC基板2の端子ランド4 ′
に端子を装入する対向穴8を穿設した。そして、部品ラ
ンド3に電子部品およびICを装着するとともに該対向
穴8に導線7 ′を装入し、リフローはんだ付は方式に
よりこれらを同時にはんだ付けして固定する。FIG. 1 is a diagram showing the basic configuration of the present invention. In the present invention, in order to solve the above-mentioned problems, the width of the slit 60 is made approximately twice the desired length of the terminal, and furthermore, the width of the slit 60 is made approximately twice as large as the desired length of the terminal, and the terminal land 4' of the hybrid IC board 2 facing the slit 6' is
A facing hole 8 into which a terminal is inserted was bored in the hole. Then, the electronic components and IC are mounted on the component land 3, and the conductive wire 7' is inserted into the opposing hole 8, and these are simultaneously soldered and fixed using the reflow soldering method.
このようにして製造されたハイブリッドIC2は端子を
取り付ける端子ランド4 ′に穿設される穴8に固定さ
れる導線7 ′を備える。The hybrid IC 2 manufactured in this manner includes a conductive wire 7' fixed to a hole 8 formed in a terminal land 4' to which a terminal is attached.
第1図において端子として導線7 ′例えばジャンパー
線を用いるので従来と比較してハイブリッドIC2’の
価格を低廉にできる。前記スリット6対向穴8を設けた
ので、導線7 ′を電子部品およびICと同時にプリン
ト基板へ固定できるようになったので従来と比較して製
造工程を簡略化でき、導線7 ′の穴8への装入には通
常使用される装置が使用でき、従来のような専用装置が
不要となる。In FIG. 1, since a conductive wire 7', for example, a jumper wire, is used as a terminal, the price of the hybrid IC 2' can be lowered compared to the conventional one. Since the hole 8 facing the slit 6 is provided, the conductor 7' can be fixed to the printed circuit board at the same time as the electronic components and IC, which simplifies the manufacturing process compared to the conventional method. For charging, commonly used equipment can be used, eliminating the need for conventional dedicated equipment.
このようにして製造されたハイブリッドICの構造は、
従来のような端子の二叉構造を必要としない導線7 ′
を用いるのでその高さを低くでき、電子機器に組み込ま
れたとき、その小形化に寄与する。The structure of the hybrid IC manufactured in this way is
Conductor 7' that does not require the conventional two-pronged terminal structure
Since the height of the device can be reduced, it contributes to the miniaturization of the device when it is incorporated into an electronic device.
以下、本発明の実施例について図面を参照して(7)
(8)
詳細に説明する。第2図は本発明の第1の実施例であり
、複数のハイブリッドIC基板からなるプリント基板の
平面図である。本図において第7図と異なる構成要素は
、ハイブリッドIC基板2の分割を容易にする従来の細
い第1のスリット6と異なり、幅が端子の所望長さの2
倍(例えば約5mmx2)であり、ハイブリッドIC基
板2の左側から第1列と第2列との間、第3列と第4列
との間に設けられる第2のスリット6 ′ならびに該第
2のスリット6 ′に面して対抗するハイブリッドIC
基板2の側部に配置され、さらに端子が貫通する穴8が
穿設される端子ランド4 ′である。第3図は第2図の
A部分において端子を取りつける平面図である。本図の
構成は、対向するハイブリッドIC基板2、各該ハイブ
リッドIC基板2の側部に位置し、それぞれに穴8が穿
設される端子ランド4 ′、各該ハイブリッドIC基板
2に挾まれる第2のスリット6 ′および対向する各端
子ランド4 ′の穴8に、第2のスリット6 ′をまた
ぐようにして装入される端子としての導線7 ′例えば
ジャンパー線からなる。第4図は第3図の側面図である
。導線7 ′の装入は対向する穴8に導線7 ′を挿入
してその両端を折り曲げる、−船釣に使用されるプリン
ト基板のジャンパー線装入機により行われる。この導線
7 ′は後述するはんだ付は後に第4図に示す中央部の
一点鎖線で切断される。導線7 ′として使用するこの
ジャンパー線は1個あたりの価格がほとんど零であり従
来の端子7と比較して低廉である。なお端子ランド4
′の穴はプリント基板の基材が樹脂基板タイプからなる
ので簡単に穿設される。Hereinafter, embodiments of the present invention will be described in detail (7) and (8) with reference to the drawings. FIG. 2 shows a first embodiment of the present invention, and is a plan view of a printed circuit board made up of a plurality of hybrid IC boards. The components in this figure that are different from those in FIG.
the second slit 6' and the second slit 6' provided between the first and second rows and between the third and fourth rows from the left side of the hybrid IC board 2 (for example, approximately 5 mm x 2). The hybrid IC facing the slit 6' of
A terminal land 4' is disposed on the side of the substrate 2 and has a hole 8 formed therein for the terminal to pass through. FIG. 3 is a plan view showing how the terminals are attached in the section A of FIG. 2. The configuration shown in this figure includes opposing hybrid IC boards 2, terminal lands 4' located on the sides of each hybrid IC board 2, each having a hole 8 formed therein, and a terminal land 4' sandwiched between each hybrid IC board 2. A conductive wire 7', for example, a jumper wire, is inserted as a terminal into the second slit 6' and the hole 8 of each opposing terminal land 4' so as to straddle the second slit 6'. FIG. 4 is a side view of FIG. 3. The conductor wire 7' is inserted into the opposing holes 8 and its both ends are bent, using a printed circuit board jumper wire insertion machine used for boat fishing. This conductive wire 7' will be soldered as will be described later and will be cut along the dotted line in the center as shown in FIG. This jumper wire used as the conductor 7' has a cost of almost zero per piece, and is cheaper than the conventional terminal 7. Note that terminal land 4
The hole ' is easily drilled because the base material of the printed circuit board is made of a resin board type.
次に本発明の実施例に係るハイブリッドICの製造工程
を説明する。第5図は本発明の実施例に係るハイブリッ
ドICの製造フローチャートである。本図において、プ
リント基板1のハイブリッド基板2には配線(図示しな
い)、部品ランド3および端子ランド4 ′が印刷され
、回路パターンが形成される(Sl)。プリント基板1
にスリット6.6 ’Vカット線5を設けるとともに
端子ランド4 ′に穴8を穿設する(S2)。ハイブリ
ッ(9)
(10)
ドIC基板2の部品ランド3とともに端子ランド4 ′
にはんだクリームが例えばスクリーン印刷またはデイス
ペンサにより塗布される(S3)。ハイブリッドIC基
板2の部品ランド3にICl0、トランジスタ、抵抗1
2、コンデンサ13等の電子部品を装着するとともに対
向する端子ランド4 ′の穴8に導線7 ′を装入する
(S4)。前記電子部品が装着されるとともに前記導線
7 ′が装入されたプリント基板1を加熱し、はんだを
溶融させて、リフローはんだ方式によってそれらをプリ
ント基板1に固定する(S5)。次に導線7 ′をその
中央部で切断しさらにVカット線5に沿ってプリント基
板1を分割することによってその高さが従来よりも低い
SIL用の各ハイブリッドIC2’が完成する(S6)
。上記の製造工程により従来技術のようにハイブリッド
IC基板2へ分割した後に端子をはんだ付けする工程が
削除される。これらのハイブリッドIC2’を電子機器
に組込まれ(S7)、さらに電子機器の小形化を図れる
ようになる。Next, a manufacturing process of a hybrid IC according to an embodiment of the present invention will be explained. FIG. 5 is a manufacturing flowchart of a hybrid IC according to an embodiment of the present invention. In this figure, wiring (not shown), component lands 3, and terminal lands 4' are printed on a hybrid board 2 of a printed circuit board 1 to form a circuit pattern (Sl). Printed circuit board 1
A slit 6.6' is provided with a V-cut line 5, and a hole 8 is bored in the terminal land 4' (S2). Hybrid (9) (10) Terminal land 4' along with component land 3 of IC board 2
A solder cream is applied, for example by screen printing or a dispenser (S3). ICl0, transistor, resistor 1 on component land 3 of hybrid IC board 2
2. Attach electronic components such as the capacitor 13, and insert the conducting wire 7' into the hole 8 of the opposing terminal land 4' (S4). The printed circuit board 1 on which the electronic components are mounted and the conductive wire 7' is inserted is heated to melt the solder and are fixed to the printed circuit board 1 by reflow soldering (S5). Next, by cutting the conductor 7' at its center and further dividing the printed circuit board 1 along the V-cut line 5, each SIL hybrid IC 2' whose height is lower than the conventional one is completed (S6).
. The above manufacturing process eliminates the process of soldering the terminals after dividing the hybrid IC board 2 as in the prior art. These hybrid ICs 2' are incorporated into electronic equipment (S7), and the electronic equipment can be further downsized.
第6図は本発明の第2の実施例であり複数のハイブリッ
ドIC基板からなるプリント基板の平面図である。本図
において、第2図と異なる構成要素は各ハイブリッドI
C基板2 ′の長平方向の両側部に穴8が穿設される端
子ランド4 ′、幅が端子の所望長さの2倍(例えば約
5+nmX2)であり、ハイブリッドIC基板2の左側
から第1列と第2列との間、第2列と第3列との間およ
び第3列と第4列との間に設けられる第2のスリット6
′、幅が端子の所望長さ(例えば約5mm)であり、
第1列と左側の側縁板18との間、および第4列と右側
の側縁板18との間に設けられる第3のスリット61、
ならびに、側縁板17および18にハイブリッドIC基
板2 ′の端子ランド4 ′の穴8に対応して穿設され
る穴8 ′である。このようにプリント基板1の構成を
することによってDILのハイブリッドIC2’が得ら
れる。製造工程は前述と同様なので説明を省略する。FIG. 6 is a plan view of a printed circuit board comprising a plurality of hybrid IC boards, which is a second embodiment of the present invention. In this diagram, the components that differ from those in Figure 2 are each hybrid I.
The terminal land 4' has holes 8 formed on both sides in the longitudinal direction of the C board 2', and the width is twice the desired length of the terminal (for example, about 5+nm x 2). A second slit 6 provided between the rows and the second row, between the second row and the third row, and between the third row and the fourth row.
', the width is the desired length of the terminal (for example, about 5 mm),
A third slit 61 provided between the first row and the left side edge plate 18 and between the fourth row and the right side edge plate 18,
Also, holes 8' are formed in the side edge plates 17 and 18 to correspond to the holes 8 of the terminal lands 4' of the hybrid IC board 2'. By configuring the printed circuit board 1 in this way, a DIL hybrid IC 2' can be obtained. The manufacturing process is the same as described above, so the explanation will be omitted.
(11)
(12)
〔発明の効果〕
以上説明したように本発明によればスリットの幅を端子
の所望長さの2倍にし、さらに該スリットを挟んで対向
するハイブリッドIC基板の端子ランドに端子を装入す
る対向穴を穿設し、部品ランドに電子部品およびICを
固定するとともに該対向穴に導線を固定するようにした
ので、端子価格を低回にでき、従来使用していた端子装
着用の専用設備が不要となり製造工程が簡略化され、ハ
イブリッドICの高さが低くなり電子機器を小形化にで
きる。(11) (12) [Effects of the Invention] As explained above, according to the present invention, the width of the slit is made twice the desired length of the terminal, and furthermore, the width of the slit is made twice as large as the desired length of the terminal, and the terminal land of the hybrid IC board facing the slit is Opposed holes are drilled into which terminals are inserted, electronic components and ICs are fixed to the component land, and conductors are fixed in the opposed holes, which reduces terminal costs and replaces conventionally used terminals. This eliminates the need for specialized installation equipment, simplifies the manufacturing process, and lowers the height of the hybrid IC, allowing electronic devices to be made smaller.
第1図は本発明の原理構成を示す図、
第2図は本発明の第1の実施例であり、複数のハイブリ
ッドIC基板からなるプリント基板を示す平面図、
第3図は第2図のA部分において端子を取り付ける平面
図、
第4図は第3図の側面図、
第5図は本発明が実施に係るハイブリッドICの製造フ
ローチャート、
第6図は本発明の第2の実施例であり、複数のハイブリ
ッドIC基板からなるプリント基板の平面図、
第7図はイ来の複数ハイブリッドIC基板からなるプリ
ント基板を示す平面図、
第8図は第7図の斜線部のハイブリッドICを示す平面
図、
第9図は第8図の側面図、
第10図は従来のハイブリッドICの製造フローチャー
トである。
図において
1・・・プリント基板、
2・・・ハイブリッドIC基板、
2 ′・・・ハイブリッドIC,3・・・部品ランド、
4 ・・・端子ランド、 5・・・分割線、6
・・・スリット、 7 ′・・・導線、8・
・・穴。
(13)
(14)
特開平3
123096 (7)
第7図の斜線部のハイブリッドICを示す平面図量
図Fig. 1 is a diagram showing the principle configuration of the present invention, Fig. 2 is a plan view showing the first embodiment of the invention, and shows a printed circuit board consisting of a plurality of hybrid IC boards, and Fig. 3 is the same as Fig. 2. FIG. 4 is a side view of FIG. 3, FIG. 5 is a manufacturing flowchart of a hybrid IC according to the present invention, and FIG. 6 is a second embodiment of the present invention. , a plan view of a printed circuit board made up of a plurality of hybrid IC boards, FIG. 7 is a plan view showing a printed board made up of a plurality of conventional hybrid IC boards, and FIG. 8 is a plan view showing the hybrid IC shown in the shaded area in FIG. 7. 9 is a side view of FIG. 8, and FIG. 10 is a manufacturing flowchart of a conventional hybrid IC. In the figure, 1...Printed circuit board, 2...Hybrid IC board, 2'...Hybrid IC, 3...Component land,
4...terminal land, 5...dividing line, 6
...Slit, 7'...Conductor, 8.
··hole. (13) (14) JP-A-3 123096 (7) Planar diagram showing the hybrid IC shown in the shaded area in Fig. 7
Claims (2)
らびに端子(7)を取り付ける端子ランド(4’)を有
する複数のハイブリッドIC基板(2)が、分割容易に
するための分割線(5)および対向する前記ハイブリッ
ドIC基板(2)の間のスリット(6’)とともに配列
されるプリント基板(1)において、 前記スリット(6’)の幅を端子の所望長さのほぼ2倍
にし、 前記スリット(6’)を挟んで対向するハイブリッドI
C基板(2)の端子ランド(4’)に端子を装入する穴
(8)を穿設し、 前記部品ランド(3)に電子部品およびICを固定する
と同時に前記対向する穴(8)同士の間に導線(7’)
を固定することを特徴とするハイブリッドICの製造方
法。1. A plurality of hybrid IC boards (2) having component lands (3) on which electronic components and ICs are mounted and terminal lands (4') on which terminals (7) are mounted are separated by a dividing line (5) for easy division and facing In the printed circuit board (1) arranged with slits (6') between the hybrid IC boards (2), the width of the slits (6') is approximately twice the desired length of the terminal, and Hybrid I facing across 6')
A hole (8) for inserting a terminal is drilled in the terminal land (4') of the C board (2), and an electronic component and an IC are fixed to the component land (3), and at the same time, the opposing holes (8) are connected to each other. Conductor (7') between
A method for manufacturing a hybrid IC, characterized by fixing.
2’)において、端子を取り付ける端子ランド(4’)
に穿設される穴(8)を貫通して固定される導線(7’
)を備えることを特徴とするハイブリッドICの構造。2. Hybrid IC equipped with electronic components and IC (
2'), the terminal land (4') where the terminal is attached.
The conducting wire (7') is fixed by passing through the hole (8) drilled in the
) A structure of a hybrid IC characterized by comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25875689A JPH03123096A (en) | 1989-10-05 | 1989-10-05 | Manufacture and structure of hybrid ic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25875689A JPH03123096A (en) | 1989-10-05 | 1989-10-05 | Manufacture and structure of hybrid ic |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03123096A true JPH03123096A (en) | 1991-05-24 |
Family
ID=17324651
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25875689A Pending JPH03123096A (en) | 1989-10-05 | 1989-10-05 | Manufacture and structure of hybrid ic |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03123096A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100473368B1 (en) * | 2001-11-19 | 2005-03-08 | 이전 | Door closeness structure |
CN106211570A (en) * | 2016-09-22 | 2016-12-07 | 京信通信技术(广州)有限公司 | Radio frequency PCB attachment structure and method of attachment |
JP2018181990A (en) * | 2017-04-10 | 2018-11-15 | 株式会社ケーヒン | Electronic control device |
-
1989
- 1989-10-05 JP JP25875689A patent/JPH03123096A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100473368B1 (en) * | 2001-11-19 | 2005-03-08 | 이전 | Door closeness structure |
CN106211570A (en) * | 2016-09-22 | 2016-12-07 | 京信通信技术(广州)有限公司 | Radio frequency PCB attachment structure and method of attachment |
JP2018181990A (en) * | 2017-04-10 | 2018-11-15 | 株式会社ケーヒン | Electronic control device |
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