JPS5925206A - Method of producing thin film condenser - Google Patents

Method of producing thin film condenser

Info

Publication number
JPS5925206A
JPS5925206A JP13397782A JP13397782A JPS5925206A JP S5925206 A JPS5925206 A JP S5925206A JP 13397782 A JP13397782 A JP 13397782A JP 13397782 A JP13397782 A JP 13397782A JP S5925206 A JPS5925206 A JP S5925206A
Authority
JP
Japan
Prior art keywords
capacitance
thin film
upper electrode
dielectric thin
providing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13397782A
Other languages
Japanese (ja)
Other versions
JPS5938725B2 (en
Inventor
正彦 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP13397782A priority Critical patent/JPS5938725B2/en
Publication of JPS5925206A publication Critical patent/JPS5925206A/en
Publication of JPS5938725B2 publication Critical patent/JPS5938725B2/en
Expired legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はガラス等の絶縁基板上にTa2NXOY、Ta
2O5等の誘電体薄膜を有する薄膜コンデンザの製造方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for producing Ta2NXOY and Ta on an insulating substrate such as glass.
The present invention relates to a method of manufacturing a thin film capacitor having a dielectric thin film such as 2O5.

薄膜コンデンサを作製する場合に、容量値調整を行わな
いで所望静電容量を得ることば困難である。このため、
従来は、ガラス基板の上にTa2N又はTa等の下部電
極を第1の部分と第2の部分とに区画した状態で設け、
この下部電極を陽極酸化することによってTaNXOY
又はTA2O5等の誘電体薄膜を設け、第1の部分の誘
電体薄膜に主容量用上部電極を設けると共に第2の部分
の誘電体薄膜上に複数の容量調整用上部電極を設け、こ
の段階で下部電極と主容量用上部電極とに計器を接続し
て靜電容量を測定し、所望容量値が得られない場合には
レーザビームで主容量用上部電極と複数の容量調整用上
部電極との間を選択的に切断し、これにより所望容量値
とした。
When manufacturing a thin film capacitor, it is difficult to obtain a desired capacitance without adjusting the capacitance value. For this reason,
Conventionally, a lower electrode made of Ta2N or Ta is provided on a glass substrate with the electrode divided into a first part and a second part.
By anodizing this lower electrode, TaNXOY
Alternatively, a dielectric thin film such as TA2O5 is provided, an upper electrode for main capacitance is provided on the dielectric thin film of the first portion, and a plurality of upper electrodes for capacitance adjustment are provided on the dielectric thin film of the second portion, and at this stage. A meter is connected to the lower electrode and the upper electrode for main capacitance to measure the static capacitance, and if the desired capacitance value cannot be obtained, a laser beam is used to measure the capacitance between the upper electrode for main capacitance and multiple upper electrodes for capacitance adjustment. was selectively cut to obtain the desired capacitance value.

ところが、保護絶縁層を設ける前に容量測定及びレーザ
ビームの投射を行うために、この工程中にコンデンサの
特性劣化、損傷等が生じる可能性があった。また、容量
調整を行っても、その後に保護絶縁層を設けたり、回路
基板に半田接着すると、熱的影響、応力等の力学的影響
等により静電容量が変化し、所望の容量値を得ることが
困難なことがあった。
However, since the capacitance is measured and the laser beam is projected before forming the protective insulating layer, there is a possibility that the characteristics of the capacitor may deteriorate or be damaged during this process. Furthermore, even if the capacitance is adjusted, if a protective insulating layer is subsequently provided or soldered to the circuit board, the capacitance will change due to thermal effects, mechanical effects such as stress, etc., and the desired capacitance value will not be obtained. There were times when it was difficult.

そこで、本発明の目的は、所望容量値を容易に得ること
が可能な薄膜コンデンサの製造方法を提供することにあ
る。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a thin film capacitor that can easily obtain a desired capacitance value.

上記目的を達成するための本発明は、光透過性絶縁基板
上に少なくとも第1の部分と該第1の部分に連続する第
2の部分とから成る下部電極な形成する工程と、酸化処
理によって前記第1の部分及び前記第2の部分の一部上
に誘電体薄膜を形成する工程と、前記第1の部分上の前
記誘電体薄膜上に主容量用上部電極を設けると共に前記
第2の部分上の前記誘電体薄膜上に複数の容量調整用上
部電極を設け、更に前記主容量用上部電極と前記複数の
容量調整用上部電極とを電気的に夫々接続するように複
数の接続部を前記絶縁基板上に設ける工程と、前記主容
量用上部電極、前記複数の容量調整用上部電極、前記複
数の接続部、前記誘電体薄膜の露出面、及び少なくとも
前記接続部近傍の前記絶縁基板を覆うよりに保護絶縁層
を設ける工程と、前記保護絶縁層を設けた後に、前記下
部電極と前記主容量用上部電極とに静電容量測定計器を
接続して静電容量を測定する工程と、前記絶縁基板の前
記下部電極が設けられている面と反対の背面側から前記
複数の接続部の内の1つ又は複数にレーザビームを投射
し、該接続部を切断することによって前記静電容量の値
を所望値に調整する工程とを具備していることを特徴と
する薄膜コンデンサの製造方法に係わるものである。
To achieve the above object, the present invention includes a step of forming a lower electrode comprising at least a first portion and a second portion continuous to the first portion on a light-transmitting insulating substrate, and an oxidation treatment. forming a dielectric thin film on a portion of the first portion and the second portion; and providing an upper electrode for main capacitance on the dielectric thin film on the first portion; A plurality of capacitance adjustment upper electrodes are provided on the dielectric thin film on the portion, and a plurality of connection portions are provided to electrically connect the main capacitance adjustment upper electrode and the plurality of capacitance adjustment upper electrodes, respectively. a step of providing the main capacitance upper electrode, the plurality of capacitance adjustment upper electrodes, the plurality of connection parts, the exposed surface of the dielectric thin film, and at least the insulating substrate near the connection part on the insulating substrate; a step of providing a protective insulating layer rather than covering it; and a step of measuring capacitance by connecting a capacitance measuring instrument to the lower electrode and the upper electrode for main capacitance after providing the protective insulating layer; The capacitance is reduced by projecting a laser beam onto one or more of the plurality of connection parts from the back side opposite to the surface on which the lower electrode of the insulating substrate is provided, and cutting the connection part. The present invention relates to a method of manufacturing a thin film capacitor, characterized by comprising a step of adjusting the value of .

上記発明によれば、保譚絶縁層を形成した後に、ガラス
基板の背面からレーザビームを投射して容量調整するの
で、保護絶縁層形成に基づく容量の変化分も補正するこ
とが可能になる。また、保護絶縁層を形成した後に、容
量測定及びレーザビーム投射を行うので、この工程での
特性の劣化又は損傷を防止することが出来る。
According to the above invention, since the capacitance is adjusted by projecting a laser beam from the back surface of the glass substrate after forming the protective insulating layer, it is also possible to correct the change in capacitance due to the formation of the protective insulating layer. Furthermore, since capacitance measurement and laser beam projection are performed after forming the protective insulating layer, deterioration or damage to characteristics in this process can be prevented.

次に、第1図及び第2l7参照して本発明の実施例に係
わる薄膜コンデンサの製造方法について述べる。
Next, a method for manufacturing a thin film capacitor according to an embodiment of the present invention will be described with reference to FIGS. 1 and 217.

第1図(A)〜(E)は工程順に薄膜コンデンサを示す
平面図、第2図(A)〜(E)は第1図の各部の断面図
である。まず、約0.5mmの透明ガラス基板(1)の
上にTa2N膜を約6000Åの厚さにスパッタリング
又は蒸着法等で形成し、これを所定パターンにフォトエ
ツチングすることによって第1図及び第2図の(A)に
示す如く、第1の部分(2a)と第2の部分(2b)と
から成る下部電極(2)を形成する。尚、第2の部分(
2b)は第1の部分(2a)に連結され、且つ分離領域
(3)を介して対向配置されている。
FIGS. 1A to 1E are plan views showing the thin film capacitor in order of process, and FIGS. 2A to 2E are sectional views of each part of FIG. 1. First, a Ta2N film is formed to a thickness of about 6000 Å on a transparent glass substrate (1) of about 0.5 mm by sputtering or vapor deposition, and this is photoetched into a predetermined pattern. As shown in (A) of the figure, a lower electrode (2) consisting of a first part (2a) and a second part (2b) is formed. Furthermore, the second part (
2b) are connected to the first portion (2a) and are arranged opposite to each other via the separation region (3).

次に、下部電極(2)を部分的に陽極酸化することによ
り、第1図及び第2図の(B)に示す如く、TaNXO
Yからなる約3000Åの誘電体薄膜(4)を形成する
Next, by partially anodizing the lower electrode (2), as shown in FIGS. 1 and 2 (B), TaNXO
A dielectric thin film (4) made of Y and having a thickness of about 3000 Å is formed.

次に、Ni−Crを50OÅ及びAuを1000Åの厚
さにスパッタリング又は蒸着し、これを所望パターンに
エツチングすることにより、第1図及び第2図の(C)
に示す如く、下部電極(2)の第1の部分(2a)上に
対応する主容量用上部電極(5)、下部電極(2)の第
2の部分(2b)上に対応する複数の容量調整用上部電
極(6)、主容量用上部電極(5)と調整用上部電極(
6)とを接続する接続部(7)を設ける。尚、この際同
時に同一金属で下部電極端子部分(8)及び上部電極端
子部分(9)を設ける。第1図(C)から明らかなよう
に、複数の容量調整用上部電極(6)及び接続部(7)
は、主容量用上部電極(5)からくし歯状に突出した状
態に設ける。
Next, by sputtering or vapor depositing Ni-Cr to a thickness of 50 Å and Au to a thickness of 1000 Å, and etching this into a desired pattern, (C) in FIGS. 1 and 2 is formed.
As shown, the upper electrode (5) for main capacitance corresponds to the first part (2a) of the lower electrode (2), and the plurality of capacitors correspond to the second part (2b) of the lower electrode (2). Upper electrode for adjustment (6), upper electrode for main capacitance (5) and upper electrode for adjustment (
6) is provided. At this time, a lower electrode terminal portion (8) and an upper electrode terminal portion (9) are provided at the same time using the same metal. As is clear from FIG. 1(C), a plurality of capacitance adjustment upper electrodes (6) and connection parts (7)
are provided in a comb-like shape protruding from the main capacitance upper electrode (5).

次に、主容量用上部電極(5)、複数の容量調整用上部
電極(6)、複数の接続部(7)、誘電体薄膜(4)の
露出面、及び少なくとも接続部(7)の近傍のガラス基
板(1)を覆うようにエポキシ樹脂からなる保護絶縁層
(10)を第1図及び第2図の(D)に示す如く設ける
Next, the exposed surface of the main capacitance upper electrode (5), the plurality of capacitance adjustment upper electrodes (6), the plurality of connection parts (7), the dielectric thin film (4), and at least the vicinity of the connection part (7) A protective insulating layer (10) made of epoxy resin is provided to cover the glass substrate (1) as shown in FIGS. 1 and 2 (D).

尚、この絶縁層(10)は、エポキシ樹脂を塗布し、空
気中150℃で加熱することにより、約12μmの厚さ
に形成する。
Note that this insulating layer (10) is formed to a thickness of about 12 μm by applying an epoxy resin and heating it in air at 150° C.

次に、端子部分(8)(9)を介して下部電極(2)と
主容量用上部電極(5)とに静電容量測定計器(図示せ
ず)を接続し、容量測定を行う。これにより、下部電極
(2)の第1の部分(2a)と主容量上部電極(5)と
の間の容量と、下部電極(2)の第2の部分(2b)と
容量調整用上部電極(6)との間の容量との和が測定さ
れる。
Next, a capacitance measuring instrument (not shown) is connected to the lower electrode (2) and the upper electrode for main capacitance (5) via the terminal portions (8) and (9) to measure the capacitance. Thereby, the capacitance between the first part (2a) of the lower electrode (2) and the main capacitance upper electrode (5), and the capacitance between the second part (2b) of the lower electrode (2) and the capacitance adjusting upper electrode (6) and the sum of the capacitances are measured.

次に、この実施例では所望容量よりも大きな容量が得ら
れるように設計されているので、複数の接続部(7)の
内の一部を第1図(E)の一部切欠平面図及び第2図(
E)の断面図に示すようにレーザビームで切断し、容量
値が所望値にプよるように調整する。
Next, since this embodiment is designed to obtain a larger capacity than the desired capacity, some of the plurality of connection parts (7) are shown in the partially cutaway plan view of FIG. Figure 2 (
It is cut with a laser beam as shown in the cross-sectional view of E), and the capacitance value is adjusted to a desired value.

この際、ガラス基板(1)が透明であることを利用し、
第2図(D)の矢印(11)示す如く、ガラス基板(1
)の背面側からNd:YAG レーザビームを接続部(
7)に投射し、レーザビームのエネルギで接続部(7)
を切断する。
At this time, taking advantage of the fact that the glass substrate (1) is transparent,
As shown by the arrow (11) in FIG. 2(D), the glass substrate (1
) from the back side of the Nd:YAG laser beam to the connecting part (
7) and connect the connection part (7) with the energy of the laser beam.
cut.

次に、配線導体に予め半田が付着されている回路基板(
図示せず)の上に、フエスダウンボンデイング形式に第
1図及び第2図(E)に示す素子を配置し、約270℃
の半田リフロー法によって端子部分(8)(9)を回路
基板に接続する。これにより、ガ    ・ラス基板(
1)側から接続部(7)を見ることが可能な装着状態と
なるので、回路基板に素子を装着した後に、静電容量を
測定し、所望容量となるようにレーザビームで接続部(
7)を切断して容量を調整することが可能になる。
Next, the circuit board (
(not shown), the elements shown in FIG. 1 and FIG.
The terminal portions (8) and (9) are connected to the circuit board by the solder reflow method. This allows the glass substrate (
1) Since the mounting state is such that the connection part (7) can be seen from the side, after mounting the element on the circuit board, measure the capacitance and connect the connection part (7) with a laser beam to obtain the desired capacitance.
7) can be cut to adjust the capacity.

上述から明らかなように、本実施例には次の利点がある
As is clear from the above, this embodiment has the following advantages.

(a)保護絶縁層(10)を形成すると、容量値が0.
5〜2.5%増えるが、保護絶縁層(10)を形成した
後に容量調整を行うので、保護絶縁層(10)の形成に
基づく容量の変比及びバラツキを除去するよつに容量調
整することが可能である。
(a) When the protective insulating layer (10) is formed, the capacitance value becomes 0.
Although it increases by 5 to 2.5%, since the capacitance is adjusted after forming the protective insulating layer (10), the capacitance is adjusted to eliminate the ratio and variation in capacitance due to the formation of the protective insulating layer (10). Is possible.

(b)保護絶縁層(10)を設けた後に、測定及びレー
ザビームによる容量調整を行うので、これ等の工程での
特注劣化及び損傷を防止することが出来る。
(b) Since measurement and capacitance adjustment using a laser beam are performed after providing the protective insulating layer (10), custom-made deterioration and damage during these steps can be prevented.

(c)フエスダウンボンデイングした後にも容量調整が
可能になるので、半田によるボンデイング時の熱等によ
る各期変化の補正も可能になる。
(c) Capacity can be adjusted even after phase-down bonding, so it is also possible to correct periodic changes due to heat during solder bonding.

以上、本発明の実施例について述べたが、本発明はこれ
に限定されるものでなく、更に変形可能なものである。
Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be further modified.

例えば、下部電極(2)をTa、誘電体薄膜(4)をT
a2O5等としてもよい。また、絶縁層(10)をSi
O2、シリコン樹脂等で形成してもよい。
For example, the lower electrode (2) is made of Ta and the dielectric thin film (4) is made of T.
It may also be a2O5 or the like. In addition, the insulating layer (10) is made of Si
It may be formed of O2, silicone resin, or the like.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例に係わる薄膜コンデンサを工程
順に示す平面図、第2図(A)(B)(C)(D)(E
)は第1図のa、b、c、d、e断面図である。 尚図面に用いられている符号に於いて、(1)はガラス
基板、(2)は下部電極、 (2a)は第1の部分、(
2b)は第2の部分、(4)は誘電体薄膜、(5)は主
容量用上部電極、(6)は容量調整用上部電極、(7)
は接続部、(10)は保護絶縁層である。 代  理  人   高  野  則  矢第1図 − 5〜 第2図 (A)     (B) (C)    (o) (E)
FIG. 1 is a plan view showing a thin film capacitor according to an embodiment of the present invention in order of process, and FIG.
) are cross-sectional views taken along lines a, b, c, d, and e in FIG. In addition, in the symbols used in the drawings, (1) is the glass substrate, (2) is the lower electrode, (2a) is the first part, (
2b) is the second part, (4) is the dielectric thin film, (5) is the upper electrode for main capacitance, (6) is the upper electrode for capacitance adjustment, (7)
is a connection part, and (10) is a protective insulating layer. Agent Norihiro Takano Figure 1-5 to Figure 2 (A) (B) (C) (o) (E)

Claims (1)

【特許請求の範囲】[Claims] (1)光透過性絶縁基板上に少なくとも第1の部分と該
第1の部分に連続する第2の部分とから成る下部電極を
形成する工程と、 酸化処理によって前記第1の部分及び前記第2の部分の
一部上に誘電体薄膜を形成する工程と、前記第1の部分
上の前記誘電体薄膜上に主容量用上部電極を設けると共
に前記第2の部分上の前記誘電体薄膜上に複数の容量調
整用上部電極を設け、更に前記主容量用上部電極ど前記
複数の容量調整用上部電極とを電気的に夫々接続するよ
うに複数の接続部を前記絶縁基板上に設ける工程と、前
記主容量用上部電極、前記複数の容置調整用上部電極、
前記複数の接続部、前記誘電体薄膜の露出面、及び少な
くとも前記接続部近傍の前記絶縁基板を覆うように保護
絶縁層を設ける工程と、前記保護絶縁層を設けあ後に、
前記下部電極と前記主容量用上部電極とに静電容量測定
計器を接続して静電容量を測定する工程と、 前記絶縁基板の前記下部電極が設けられている面と反対
の背面側から前記複数の接続部の内の1つ又は複数にレ
ーザビームを投射し、該接続部を切断することによって
前記静電容量の値を所望値に調整する工程と を具備していることを特徴とする薄膜コンデンサの製造
方法。
(1) forming a lower electrode consisting of at least a first portion and a second portion continuous to the first portion on a light-transmitting insulating substrate; and performing an oxidation treatment to remove the first portion and the second portion. a step of forming a dielectric thin film on a part of the second portion, and providing an upper electrode for main capacitance on the dielectric thin film on the first portion and on the dielectric thin film on the second portion; a step of providing a plurality of capacitance adjustment upper electrodes on the insulating substrate, and further providing a plurality of connecting portions on the insulating substrate so as to electrically connect the main capacitance upper electrode and the plurality of capacitance adjustment upper electrodes, respectively; , the main capacitance upper electrode, the plurality of container adjustment upper electrodes,
providing a protective insulating layer to cover the plurality of connection parts, the exposed surface of the dielectric thin film, and at least the insulating substrate near the connection parts; and after providing the protective insulating layer,
measuring the capacitance by connecting a capacitance measuring instrument to the lower electrode and the upper electrode for main capacitance; The method is characterized by comprising a step of projecting a laser beam onto one or more of the plurality of connection parts and cutting the connection part to adjust the value of the capacitance to a desired value. Method of manufacturing thin film capacitors.
JP13397782A 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors Expired JPS5938725B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13397782A JPS5938725B2 (en) 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13397782A JPS5938725B2 (en) 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors

Publications (2)

Publication Number Publication Date
JPS5925206A true JPS5925206A (en) 1984-02-09
JPS5938725B2 JPS5938725B2 (en) 1984-09-19

Family

ID=15117495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13397782A Expired JPS5938725B2 (en) 1982-07-31 1982-07-31 Method of manufacturing thin film capacitors

Country Status (1)

Country Link
JP (1) JPS5938725B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006332643A (en) * 2005-05-23 2006-12-07 Tektronix Inc Circuit element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006332643A (en) * 2005-05-23 2006-12-07 Tektronix Inc Circuit element

Also Published As

Publication number Publication date
JPS5938725B2 (en) 1984-09-19

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