JP2502581B2 - Method for forming protruding electrode of semiconductor element - Google Patents

Method for forming protruding electrode of semiconductor element

Info

Publication number
JP2502581B2
JP2502581B2 JP62087310A JP8731087A JP2502581B2 JP 2502581 B2 JP2502581 B2 JP 2502581B2 JP 62087310 A JP62087310 A JP 62087310A JP 8731087 A JP8731087 A JP 8731087A JP 2502581 B2 JP2502581 B2 JP 2502581B2
Authority
JP
Japan
Prior art keywords
semiconductor element
electrode
forming
gold
protruding electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62087310A
Other languages
Japanese (ja)
Other versions
JPS63252447A (en
Inventor
康行 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62087310A priority Critical patent/JP2502581B2/en
Publication of JPS63252447A publication Critical patent/JPS63252447A/en
Application granted granted Critical
Publication of JP2502581B2 publication Critical patent/JP2502581B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電気機器等に使用される半導体素子の突起電
極の形成方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a protruding electrode of a semiconductor element used in electric equipment and the like.

従来の技術 従来の半導体素子の突起電極形成方法の第1の方法の
各工程を第2図a〜cに従って具体的に説明する。まず
第2図aに示すようにリード線となる銅箔10の先端に厚
みが約50μm〜100μmの金よりなる電極9が熱圧着さ
れたものを用意する。次に第2図bに示すように熱圧着
治具7を用いて半導体素子3の電極取出部となるアルミ
電極5上に、前述の銅箔10と一体化した金電極9を熱圧
着し、第2図cに示す半導体素子3のアルミ電極5上に
突起電極が形成された完成品を得る。なお、4は半導体
素子3の保護層を示している。
2. Description of the Related Art Each step of the first method of forming a protruding electrode of a conventional semiconductor device will be specifically described with reference to FIGS. First, as shown in FIG. 2A, an electrode 9 made of gold having a thickness of about 50 μm to 100 μm is thermocompression bonded to the tip of a copper foil 10 to be a lead wire. Next, as shown in FIG. 2B, a thermocompression bonding jig 7 is used to thermocompress the gold electrode 9 integrated with the above-mentioned copper foil 10 on the aluminum electrode 5 serving as the electrode extraction portion of the semiconductor element 3, A finished product in which a protruding electrode is formed on the aluminum electrode 5 of the semiconductor element 3 shown in FIG. 2c is obtained. Reference numeral 4 represents a protective layer of the semiconductor element 3.

次に、第2の方法の各工程を第3図a〜fに従って具
体的に説明する。なお、第2図と同一の構成部品には同
一符号を付している。まず、第3図aに示すように半導
体素子3のアルミ電極5を含む面全体にスパッタリング
によりクロム層11を形成する。このクロム層11の上から
銅をスパッタリングし銅薄膜層12を形成した状態を第3
図bに示す。次に第3図cに示すようにフォトレジスト
13を全面にスピンナ塗布・硬化した後、所定のパターニ
ングを行い、さらに第3図dに示すように銅の層を厚く
する目的で銅メッキを行い銅メッキ層14を形成する。し
かる後に、第3図eに示すようにフォトレジスト13をエ
ッチング除去し、銅箔膜12やクロム層11の不要部分をエ
ッチングする。この銅メッキ層14の上に半田ボール15を
フローにて接合し、第3図fに示す完成品となる。
Next, each step of the second method will be specifically described with reference to FIGS. The same components as those in FIG. 2 are designated by the same reference numerals. First, as shown in FIG. 3A, a chromium layer 11 is formed on the entire surface of the semiconductor element 3 including the aluminum electrode 5 by sputtering. The state where the copper thin film layer 12 is formed by sputtering copper on the chromium layer 11
Shown in Figure b. Next, as shown in FIG.
After spinner 13 is applied and cured on the entire surface, predetermined patterning is performed, and then copper plating is performed to form a copper plating layer 14 for the purpose of thickening the copper layer, as shown in FIG. 3d. Then, as shown in FIG. 3e, the photoresist 13 is removed by etching, and unnecessary portions of the copper foil film 12 and the chromium layer 11 are etched. Solder balls 15 are bonded on the copper plating layer 14 by a flow to obtain a finished product shown in FIG.

発明が解決しようとする問題点 ところが、上記第1の方法についてはリード線となる
銅箔10が半導体素子7の表面に直接接することなく、電
極9を介して銅箔10とアルミ電極5とを接合するために
は、金よりなる電極9の厚みが約50μm〜100μm必要
であるためコストは非常に高いものとなる。上記第2の
方法については工程が複雑であり、メッキ液やエッチン
グ液等が半導体素子3に触れるために半導体素子3への
ダメージが大きく信頼性が著しく低下する。また、製造
工程で必要な設備がスピンナ塗布機,紫外線露光装置,
スパッタリング装置,メッキ装置等の高価な設備が多い
ので製造費用も高くついてしまう欠点があった。
DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the first method, the copper foil 10 serving as the lead wire is not directly in contact with the surface of the semiconductor element 7, and the copper foil 10 and the aluminum electrode 5 are connected via the electrode 9. In order to join, the thickness of the electrode 9 made of gold is required to be about 50 μm to 100 μm, and the cost is very high. In the second method, the process is complicated, and the plating solution, the etching solution, and the like come into contact with the semiconductor element 3, so that the semiconductor element 3 is greatly damaged and the reliability is significantly reduced. In addition, the equipment required in the manufacturing process is a spinner coating machine, an ultraviolet exposure device,
Since there are many expensive equipment such as sputtering equipment and plating equipment, the manufacturing cost is high.

本発明はこのような従来の問題点を解消するものであ
り、簡単な構成で低コスト、かつ高信頼性の半導体素子
の突起電極形成方法を提供するものである。
The present invention solves such a conventional problem, and provides a method for forming a protruding electrode for a semiconductor device having a simple structure, low cost, and high reliability.

問題点を解決するための手段 本発明の半導体素子の突起電極形成方法は、第1の表
面とその第1の表面に対向する第2の表面にのみそれぞ
れ金メッキ処理された電気的抵抗材料からなる部材を、
前記第1の表面が半導体素子の電極取出部と当接するよ
う熱圧着して接合することを特徴とするものである。
Means for Solving the Problems A method for forming a bump electrode of a semiconductor device according to the present invention comprises an electrically resistive material in which only a first surface and a second surface facing the first surface are gold-plated. Parts
It is characterized in that the first surface is bonded by thermocompression bonding so as to come into contact with the electrode extraction portion of the semiconductor element.

また誘電率の大なる材料にて部材を構成し、前記部材
の第1の表面とその第1の表面に対向する第2の表面に
のみそれぞれ金メッキ処理を施すことにより、金メッキ
層間でコンデンサを形成し、前記第1の表面が半導体素
子の電極取出部と当接するよう熱圧着して接合すること
を特徴とするものである。
A member is formed of a material having a large dielectric constant, and gold plating is applied only to the first surface of the member and the second surface opposite to the first surface, thereby forming a capacitor between the gold-plated layers. Then, the first surface is bonded by thermocompression so that the first surface comes into contact with the electrode lead-out portion of the semiconductor element.

作用 この本発明の半導体素子の突起電極形成方法によれ
ば、突起電極として表面が金メッキされた部材を用いる
ために、金メッキの厚みは薄くてよくコストは非常に安
くなる。また、半導体素子のアルミ電極部に、この突起
電極を熱圧着して接合するだけであるため形成工法にお
ける半導体素子へのダメージは少なく、かつ簡単な方法
で工程費用も安く形成できるものである。
Effect According to the method for forming the bump electrode of the semiconductor element of the present invention, since the member whose surface is gold-plated is used as the bump electrode, the gold plating can be thin and the cost is very low. Further, since the protruding electrode is simply bonded to the aluminum electrode portion of the semiconductor element by thermocompression bonding, the semiconductor element is less damaged in the forming method, and the process cost can be reduced by a simple method.

さらに部材が電気抵抗材料であるので、所定の電気抵
抗を介して信号の授受を行うことができ、また部材をコ
ンデンサ材料で構成すれば、所定の容量を介して信号の
授受を行うことができる。
Furthermore, since the member is an electric resistance material, signals can be transmitted and received via a predetermined electric resistance, and if the member is made of a capacitor material, signals can be transmitted and received via a predetermined capacitance. .

実施例 以下、本発明の一実施例について各工程を第1図a〜
fに従って具体的に説明する。なお、第3図と同一構成
部品には同一符号を付している。第1図aに示す突起電
極の核になる部材8は、酸化ルテニウム等の電気的抵抗
材料、あるいはチタン酸バリウム等の比誘電率の大きな
コンデンサ材料でできており、その形状は第1の表面と
なる1つの面8aは少なくとも平坦であり、かつ半導体素
子3のアルミ電極5の面よりも外形サイズが小さいこと
を必要とするが他の形状については任意でよい。
Example Hereinafter, each step of one example of the present invention will be described with reference to FIGS.
A detailed description will be given according to f. The same components as those in FIG. 3 are designated by the same reference numerals. The member 8 serving as the nucleus of the bump electrode shown in FIG. 1a is made of an electric resistance material such as ruthenium oxide or a capacitor material having a large relative dielectric constant such as barium titanate, and its shape is the first surface. It is necessary that at least one of the surfaces 8a is flat and has a smaller outer size than the surface of the aluminum electrode 5 of the semiconductor element 3, but other shapes may be arbitrary.

この部材8の第1の表面8aとその第1の表面8aに対向
する第2の表面8bにのみ第1図bに示すように金メッキ
2を行う。しかる後に半導体素子3のアルミ電極5上に
金メッキ層2の形成された部材8を熱圧着し、熱圧着後
メタルマスク6を除去して第1図dに示すように半導体
素子3のアルミ電極5上に突起電極を形成した完成品が
できる。この実施例の場合、前記部材8が電気抵抗材料
であれば、所定の電気抵抗を介して信号の授受が行われ
るものであり、前記部材8がコンデンサ材料であれば、
所定の容量を介して信号の授受が行なえるものである。
Only the first surface 8a of the member 8 and the second surface 8b opposite to the first surface 8a are plated with gold 2 as shown in FIG. 1b. Thereafter, the member 8 having the gold plating layer 2 formed thereon is thermocompression bonded onto the aluminum electrode 5 of the semiconductor element 3, and after the thermocompression bonding, the metal mask 6 is removed to remove the aluminum electrode 5 of the semiconductor element 3 as shown in FIG. A finished product with a protruding electrode formed on it is obtained. In the case of this embodiment, if the member 8 is an electric resistance material, signals are transmitted and received via a predetermined electric resistance, and if the member 8 is a capacitor material,
Signals can be sent and received via a predetermined capacity.

発明の効果 以上のように、本発明の半導体素子の突起電極形成方
法は、対向する2つの表面にのみ金メッキが施された部
材を半導体素子表面の電極取付部に熱圧着して接合し、
半導体素子の突起電極を形成する方法であり、部材の表
面を金メッキして突起電極とするために金メッキの厚さ
は薄くてよくコストは大幅に安く、また半導体素子の受
けるダメージは熱圧着時の熱と若干の圧力だけであるた
め信頼性も向上する。さらに突起電極自体にコンデンサ
あるいは抵抗体等の機能をもたせているので、実用性の
高い極めて有用なものとなる。
EFFECTS OF THE INVENTION As described above, in the method of forming a protruding electrode of a semiconductor element of the present invention, a member having only two surfaces facing each other with gold plating is thermocompression-bonded to an electrode mounting portion on the surface of the semiconductor element to join the members.
This is a method of forming a protruding electrode of a semiconductor element.Since the surface of the member is plated with gold to form a protruding electrode, the thickness of the gold plating can be thin and the cost is significantly low. Reliability is also improved due to only heat and some pressure. Further, since the protruding electrode itself has a function of a capacitor or a resistor, it is highly practical and extremely useful.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例である半導体素子の突起電極
形成方法を工程順に示す側断面図、第2図は従来の半導
体素子の突起電極形成方法を工程順に示す側断面図、第
3図は従来の半導体素子の他の突起電極形成方法を工程
順に示す側断面図である。 2……金メッキ層、3……半導体素子、4……保護層、
5……アルミ電極、8……部材。
FIG. 1 is a side sectional view showing a method of forming a protruding electrode of a semiconductor device according to an embodiment of the present invention in the order of steps, and FIG. 2 is a side sectional view showing a method of forming a protruding electrode of a conventional semiconductor element in the order of steps. The drawings are side cross-sectional views showing another conventional method of forming protruding electrodes of a semiconductor element in the order of steps. 2 ... gold-plated layer, 3 ... semiconductor element, 4 ... protective layer,
5 ... Aluminum electrode, 8 ... Material.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】第1の表面とその第1の表面に対向する第
2の表面にのみそれぞれ金メッキ処理された電気的抵抗
材料からなる部材を、前記第1の表面が半導体素子の電
極取出部と当接するよう熱圧着して接合することを特徴
とする半導体素子の突起電極形成方法。
1. A member made of an electric resistance material, each of which is gold-plated only on a first surface and a second surface facing the first surface, wherein the first surface is an electrode lead-out portion of a semiconductor element. A method for forming a protruding electrode for a semiconductor element, which comprises thermocompression bonding so as to come into contact with the bonding.
【請求項2】誘電率の大なる材料にて部材を構成し、前
記部材の第1の表面とその第1の表面に対向する第2の
表面にのみそれぞれ金メッキ処理を施すことにより、金
メッキ層間でコンデンサを形成し、前記第1の表面が半
導体素子の電極取出部と当接するよう熱圧着して接合す
ることを特徴とする半導体素子の突起電極形成方法。
2. A gold-plated layer is formed by forming a member with a material having a large dielectric constant, and subjecting only a first surface of the member and a second surface facing the first surface to gold plating. And forming a capacitor by thermocompression bonding so that the first surface is in contact with the electrode lead-out portion of the semiconductor element.
JP62087310A 1987-04-09 1987-04-09 Method for forming protruding electrode of semiconductor element Expired - Fee Related JP2502581B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62087310A JP2502581B2 (en) 1987-04-09 1987-04-09 Method for forming protruding electrode of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62087310A JP2502581B2 (en) 1987-04-09 1987-04-09 Method for forming protruding electrode of semiconductor element

Publications (2)

Publication Number Publication Date
JPS63252447A JPS63252447A (en) 1988-10-19
JP2502581B2 true JP2502581B2 (en) 1996-05-29

Family

ID=13911262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62087310A Expired - Fee Related JP2502581B2 (en) 1987-04-09 1987-04-09 Method for forming protruding electrode of semiconductor element

Country Status (1)

Country Link
JP (1) JP2502581B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2744476B2 (en) * 1989-07-31 1998-04-28 松下電器産業株式会社 Semiconductor device and manufacturing method thereof
US5665639A (en) * 1994-02-23 1997-09-09 Cypress Semiconductor Corp. Process for manufacturing a semiconductor device bump electrode using a rapid thermal anneal
JP2002353264A (en) * 2001-05-29 2002-12-06 Toppan Printing Co Ltd Semiconductor element with bumps and semiconductor device using the same
JP5386481B2 (en) * 2008-05-09 2014-01-15 パナソニック株式会社 Semiconductor device and manufacturing method thereof
US8044512B2 (en) * 2009-06-25 2011-10-25 International Business Machines Corporation Electrical property altering, planar member with solder element in IC chip package

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265860A (en) * 1975-11-29 1977-05-31 Fujitsu Ltd Method of connecting lead wire
JPS59143352A (en) * 1983-02-05 1984-08-16 Matsushita Electric Ind Co Ltd Film carrier with bump and manufacture thereof

Also Published As

Publication number Publication date
JPS63252447A (en) 1988-10-19

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