JP2002353264A - Semiconductor element with bumps and semiconductor device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor element having bumps and a semiconductor device capable of reducing switching noise, noise in a signal line, and crosstalk generated between wires. SOLUTION: A semiconductor element 300 with bumps, where at least one resistor bump 22 and at least one dielectric bump 23 other than regular bumps 21 are formed on an electrode of the semiconductor element 10, is mounted on a printed wiring board 40, and thus obtaining the semiconductor device 400 where the bumps 21, the resistor bump 22 and the dielectric bump 23 of the semiconductor element with bumps are electrically connected to a wiring layer 49.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device with bumps and a semiconductor device for connecting a semiconductor device to an external circuit.

[0002]

2. Description of the Related Art A conventional semiconductor device with bumps will be described below. As the structure of the semiconductor device with bumps,
On the Al (aluminum) electrode 52 on the semiconductor element 10, a metal thin film for adhesion (Cr (chromium), Ti (titanium), Ni (nickel), etc.) and a metal thin film for diffusion barrier (W (tungsten), Pt (platinum) ), Ni, Cu
(Copper) or the like via the thin-film conductor layer 53
A bump 61 made of (gold), Cu (copper), Pb (lead) / Sn (tin) or the like is formed, and all bumps 6 are formed.
1 are made of the same metal (see FIG. 6).

[0003] In recent years, semiconductor devices have become multi-electrode, high-speed,
Due to the increase in frequency and the like, switching noise, noise in signal lines, and crosstalk between wirings have become serious problems. To solve these problems, passive elements such as resistors and capacitors are mounted on the printed wiring board on which the semiconductor elements are mounted, and we are trying to solve these problems. Due to the influence of the above, the length of the wiring connecting the semiconductor element and the passive element has begun to further affect the above problem. In addition, the passive elements are mounted on the printed wiring board by providing lands on the surface of the printed wiring board and performing soldering, but the mounting area is limited to the surface of the printed wiring board, and the size of the printed wiring board is reduced. There is also a problem that there is a limit.

[0004]

SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned problems, and has a semiconductor device with bumps capable of reducing switching noise, noise in signal lines, and crosstalk between wirings. It is an object to provide a semiconductor device.

[0005]

In order to solve the above problems in the present invention, first, in a semiconductor device having bumps formed on electrodes, at least one of the bumps is formed from a resistor bump. And a semiconductor device with bumps.

According to a second aspect of the present invention, there is provided a semiconductor device having bumps formed on electrodes, wherein at least one of the bumps is formed of a dielectric bump.

According to a third aspect of the present invention, in a semiconductor device having a bump formed on an electrode, at least one bump comprises a resistor bump and at least one bump comprises a dielectric bump. It is a semiconductor element.

According to a fourth aspect of the present invention, there is provided a semiconductor device in which the semiconductor element with a bump according to any one of the first to third aspects is mounted on a multilayer printed wiring board.

[0009]

Embodiments of the present invention will be described. FIG. 1 is a schematic partial sectional view showing an embodiment of a semiconductor device with bumps according to claim 1 of the present invention.
3 is a schematic partial sectional view showing an embodiment of a semiconductor device with bumps according to claim 2 of the present invention, and FIG. 3 is a schematic diagram showing an embodiment of a semiconductor device with bumps according to claim 3 of the present invention. FIG. 4 is a schematic partial cross-sectional view showing an embodiment of a semiconductor device in which a semiconductor element with bumps of the present invention is mounted on a printed wiring board. The invention according to claim 1 of the present invention is, as shown in FIG. 1, in a semiconductor device in which a bump 21 is formed on an Al (aluminum) electrode 12 on a semiconductor device 10, at least one of the bumps is made of nickel or the like. This is constituted by the resistor bumps 22. According to a second aspect of the present invention, as shown in FIG. 2, in a semiconductor device in which a bump 21 is formed on an Al (aluminum) electrode 12 on a semiconductor device 10, at least one bump is made of a dielectric material. This is constituted by the dielectric bumps 23 and is intended to be used as a capacitor. According to a third aspect of the present invention, as shown in FIG.
In a semiconductor device in which a bump 21 is formed on an l (aluminum) electrode 12, at least one bump includes a resistor bump 22 and at least one bump includes a dielectric bump 23. According to a fourth aspect of the present invention, as shown in FIG. 4, the semiconductor device with bumps according to the first to third aspects is mounted on a printed wiring board to form a semiconductor device.

In the semiconductor device with bumps according to the present invention, the resistor as a passive element and the dielectric as a capacitor are present as bumps on the electrodes of the semiconductor device. Therefore, the semiconductor device with bumps of the present invention is mounted on a printed wiring board. In the semiconductor device described above, there is almost no wiring length between the semiconductor element and the dielectric material serving as the resistor and the capacitor, thereby making it possible to reduce noise in signal lines and crosstalk generated between wirings. In addition, by incorporating the dielectrics serving as resistors and capacitors as bumps on the semiconductor element, the mounting area of the printed wiring board on which the semiconductor element is mounted can be made larger, so that the density and size of the printed wiring board can be increased. Becomes

[0011]

The present invention will be described in detail with reference to the following examples. <Embodiment 1> FIGS. 5A to 5G are schematic partial sectional views showing an example of a manufacturing process of a semiconductor device with bumps according to the first embodiment. A photosensitive polyimide (Photonice: manufactured by Toray) is applied to the circuit side of a semiconductor element (semiconductor element group) 10 having a circuit formed on a silicon wafer and dried to form a polyimide photosensitive layer, and a series of patterning such as exposure and development is performed. By performing the treatment, the Al electrode 12 was exposed and thermally cured in an inert gas to form a 2 μm-thick polyimide pattern 14 (see FIG. 5A).

Next, on the polyimide pattern 14 and the Al electrode 12, Cr for improving the adhesion strength is formed by sputtering.
Each of a thin film and a Ni thin film for a diffusion barrier is 1000
厚 み, and the thin film conductor layer 15 was formed (FIG. 5).
(B)).

Next, a photoresist having a predetermined thickness is formed on the thin film conductor layer 15 of the semiconductor element 10, and a series of patterning processes such as exposure and development are performed to form bumps on the Al electrode 12 by electrolytic plating. A resist pattern 16 and an opening 17 having a height of 50 μm are formed (FIG. 5C).
reference). Here, the opening 17 is for forming a normal bump on the Al electrode 12, and no opening is formed at the resistor bump forming position.

Next, using the thin film conductor layer 15 as a cathode, electrolytic Au plating was performed on the opening 17 to form a bump 21 made of Au having a height of about 40 μm (see FIG. 5D).

Next, the resist pattern 16 is peeled off, a photoresist having a predetermined thickness is formed on the semiconductor element 10 on which the bumps 21 are formed, and a series of patterning processes such as exposure and development are performed. A resist pattern 18 having a height of 50 μm and an opening 19 for forming a resistance bump by electrolytic plating were formed on the Al electrode 12.
(E)).

Next, using the thin film conductor layer 15 as a cathode, electrolytic Ni plating was applied to the opening 19 to form a resistance bump 22 having a height of about 40 μm (see FIG. 5F).

Next, the resist pattern 18 is peeled off, the thin film conductor layer 15 is soft-etched with a dedicated processing solution (aqueous ammonium persulfate, hydrochloric acid, etc.), and the semiconductor element group is cut with a dicing saw (wafer cutting machine) to form a chip. As a result, the bumped semiconductor device 100 of the present invention in which the bump 21 made of Au and the resistance bump 22 were formed on the electrode 12 of the semiconductor device 10 was manufactured (see FIG. 5G).

<Embodiment 2> FIGS. 6 (a) to 6 (g) are schematic partial sectional views showing an example of a manufacturing process of a semiconductor device with bumps according to the second aspect. A photosensitive polyimide (Photonice: manufactured by Toray) is applied to the circuit side of a semiconductor element (semiconductor element group) 10 having a circuit formed on a silicon wafer,
By drying, forming a polyimide photosensitive layer, performing a series of patterning processes such as exposure, development, and the like, exposing the Al electrode 12, further, by heat curing in an inert gas,
A polyimide pattern 14 having a thickness of 2 μm was formed (FIG. 6).
(See (a)).

Next, on the polyimide pattern 14 and the Al electrode 12, Cr for improving the adhesion strength is formed by sputtering.
Each of a thin film and a Ni thin film for a diffusion barrier is 1000
厚 み to form a thin-film conductor layer 15 (FIG. 6).
(B)).

Next, a photoresist having a predetermined thickness is formed on the thin-film conductor layer 15 of the semiconductor element 10, and a series of patterning processes such as exposure and development are performed to form bumps on the Al electrode 12 by electrolytic plating. A resist pattern 16 and an opening 17 having a height of 50 μm are formed (FIG. 6C).
reference).

Next, using the thin film conductor layer 15 as a cathode, the opening 17 was subjected to electrolytic Au plating to form a bump 21 made of Au having a height of about 40 μm (see FIG. 6D).

Next, the resist pattern 16 is peeled off, a photoresist having a predetermined thickness is formed on the semiconductor element 10 on which the bumps 21 are formed, and a series of patterning processes such as exposure and development are performed. A resist pattern 18 having a height of 50 μm and an opening 19 for forming a resistance bump by electrolytic plating were formed on the Al electrode 12 (FIG. 6).
(E)).

Next, a dielectric paste (Glaska 1100)
11: manufactured by HISAKA LABORATORY CO., LTD., Was embedded in the opening 19 by screen printing, and dried to form a dielectric bump 23 having a height of about 40 μm (see FIG. 6F).

Next, the resist pattern 18 is peeled off, the thin film conductor layer 15 is soft-etched with a dedicated processing solution (aqueous ammonium persulfate solution, hydrochloric acid, etc.), and the semiconductor element group is cut with a dicing saw (wafer cutting machine). As a result, a bumped semiconductor device 200 of the present invention in which a bump 21 made of Au and a dielectric bump 23 were formed on the electrode 12 of the semiconductor device 10 was manufactured (see FIG. 6G).

<Embodiment 3> FIGS. 7 (a) to 7 (g) are schematic partial sectional views showing an example of a manufacturing process of a semiconductor device with bumps according to the third aspect. A photosensitive polyimide (Photo Nice: manufactured by Toray) is applied to the circuit side of a semiconductor element (semiconductor element group) 10 having a circuit formed on a silicon wafer,
By drying, forming a polyimide photosensitive layer, performing a series of patterning processing such as exposure, development, and the like, exposing the Al electrode 12, further, by thermosetting in an inert gas,
A 2 μm-thick polyimide pattern 14 was formed (FIG. 7).
(See (a)).

Next, on the polyimide pattern 14 and the Al electrode 12, Cr for improving the adhesion strength is formed by sputtering.
Each of a thin film and a Ni thin film for a diffusion barrier is 1000
Å to form a thin-film conductor layer 15 (FIG. 7).
(B)).

Next, a photoresist having a predetermined thickness is formed on the thin-film conductor layer 15 of the semiconductor element 10, and a series of patterning processes such as exposure and development are performed to form bumps on the Al electrode 12 by electrolytic plating. A resist pattern 16 and an opening 17 having a height of 50 μm are formed (FIG. 7C).
reference).

Next, using the thin film conductor layer 15 as a cathode, the opening 17 was subjected to electrolytic Au plating to form a bump 21 made of Au having a height of about 40 μm (see FIG. 7D).

Next, the resist pattern 16 is peeled off, a photoresist having a predetermined thickness is formed on the semiconductor element 10 on which the bumps 21 are formed, and a series of patterning processes such as exposure and development are performed. A resist pattern 18 having a height of 50 μm and an opening for forming a resistance bump by electrolytic plating on the Al electrode 12 are formed, the thin film conductor layer 15 is used as a cathode, and the opening is subjected to electrolytic Ni plating.
The resistance bump 22 having a height of about 40 μm was formed (FIG. 7).
(E)).

Next, the resist pattern 18 is peeled off, a photoresist having a predetermined thickness is formed on the semiconductor element 10 on which the bumps 21 and the resistance bumps 22 are formed, and a series of patterning processes such as exposure and development are performed. A resist pattern 31 having a height of 50 μm and an opening for forming a dielectric bump by electrolytic plating on the bump 21 and the Al electrode 12 are formed, and a dielectric paste (Glaska 1100-1) is formed.
1: Hisaka Laboratories) is embedded in the opening by screen printing, dried, and the dielectric bump 2 having a height of about 40 μm is formed.
No. 3 was formed (see FIG. 7F).

Next, the resist pattern 31 is peeled off, the thin film conductor layer 15 is soft-etched with a special processing solution (aqueous ammonium persulfate solution, hydrochloric acid, etc.), and the semiconductor element group is cut with a dicing saw (wafer cutting machine). As a result, the bumped semiconductor element 300 of the present invention in which the Au bump 21, the resistance bump 22, and the dielectric bump 23 were formed on the electrode 12 of the semiconductor element 10 was manufactured (see FIG. 7G). .

<Embodiment 4> FIGS. 8A to 8E are schematic partial sectional views showing an example of a manufacturing process of a semiconductor device in which a semiconductor element with bumps is mounted on a printed wiring board.
First, the bumped semiconductor element 300 of the present invention was mounted via an Ag paste on the land 44 of the printed wiring board 40 in which the wiring layer 42 and the land 44 were formed on the insulating substrate 41 (FIGS. 8A and 8B). )reference).

Next, an insulating resin is applied on the printed wiring board, dried, and the surface of the insulating resin is mechanically polished to form an insulating layer 44 exposing the front end surfaces of the bumps of the semiconductor element 300 with bumps. Then, a via hole 46 was formed at a predetermined position of the insulating layer 44 with a YAG laser or the like (FIG. 8C).
reference). As the insulating resin, a resin obtained by mixing an epoxy resin with a modified urethane resin, specifically, UF manufactured by Ajinomoto Co., Inc.
R-1000 is preferred.

Next, the surface of the insulating resin is roughened with a permanganic acid aqueous solution or the like, a 1 μm-thick thin film conductor layer made of Cu is formed by electroless Cu plating, and a photoresist layer is formed on the thin film conductor layer. Was formed and a series of patterning processes such as exposure and development were performed to form a resist pattern 47 (see FIG. 8D).

Next, a copper layer of 10 μm in thickness is formed by electrolytic Cu plating using the resist pattern 47 as a plating mask and the thin film conductor layer as a cathode to form a conductor layer and a via hole 48. The wiring layer 49 is formed by soft-etching the thin-film conductor layer under the resist pattern 47 with an aqueous solution of ammonium persulfate to form a wiring layer 49. The bump 21, the resistor bump 22, and the dielectric A semiconductor device 400 of the present invention in which the body bump 23 and the wiring layer 49 were electrically connected was obtained (see FIG. 8E). Further, if necessary, a semiconductor device including a multilayer printed wiring board having a predetermined number of layers can be obtained by repeating the steps of forming the insulating layer and the wiring layer.

[0036]

As described above, in the semiconductor device on which the semiconductor element with bumps of the present invention is mounted, since the resistor and the dielectric, which are the passive elements, are present on the electrodes of the semiconductor element, the semiconductor element and the passive element are separated. Has little wiring length, thereby enabling reduction of noise in signal lines, crosstalk generated between wirings, and switching noise. Furthermore, by forming a bump on the dielectric which will be a resistor and a capacitor on the semiconductor element, the mounting area of the printed wiring board on which the semiconductor element is mounted can be given a margin, so that the density and the size of the printed wiring board can be increased. Become.

[Brief description of the drawings]

FIG. 1 is a schematic partial configuration sectional view showing one embodiment of a semiconductor device with bumps according to claim 1 of the present invention.

FIG. 2 is a schematic partial sectional view showing one embodiment of a semiconductor device with bumps according to claim 2 of the present invention.

FIG. 3 is a schematic partial sectional view showing an embodiment of a semiconductor device with bumps according to claim 3 of the present invention.

FIG. 4 is a schematic partial cross-sectional view showing one embodiment of a semiconductor device in which a semiconductor device with bumps of the present invention is mounted on a printed wiring board.

FIGS. 5A to 5G are schematic partial sectional views showing an example of a manufacturing process of the semiconductor device with bumps according to claim 1 of the present invention.

6 (a) to 6 (g) are schematic partial sectional views showing an example of a manufacturing process of a semiconductor device with bumps according to claim 2 of the present invention.

FIGS. 7A to 7G are schematic partial sectional views showing an example of a manufacturing process of a semiconductor device with bumps according to claim 3 of the present invention.

FIGS. 8A to 8E are schematic partial cross-sectional views illustrating an example of a manufacturing process of a semiconductor device in which a semiconductor element with bumps is mounted on a printed wiring board.

FIG. 9 is a schematic partial sectional view showing an example of a conventional semiconductor device with bumps.

[Explanation of symbols]

10 semiconductor element 11, 51 insulating layer 12, 52 Al electrode 13 SiO ₂ layer 14 polyimide pattern 15, 53 thin film conductor layer 16, 18, 31 resist pattern 17, 19 ... Openings 21, 61 Bumps 22 Resistor bumps 23 Dielectric bumps 40 Printed wiring board 41 Insulating substrate 42 Wiring layer 43 Through hole 44 Land 45 Insulating layer 46: Via hole hole 47: Resist pattern 48: Via hole 49: Wiring layer 100, 200, 300: Semiconductor element with bump 400: Semiconductor device

Claims (4)

[Claims] 1. A bumped semiconductor device having bumps formed on electrodes, wherein at least one of the bumps comprises a resistor bump. 2. A bumped semiconductor device having bumps formed on electrodes, wherein at least one of the bumps comprises a dielectric bump. 3. A bumped semiconductor device having bumps formed on electrodes, wherein at least one of the bumps comprises a resistor bump and at least one of the bumps comprises a dielectric bump. 4. A semiconductor device comprising the bumped semiconductor element according to claim 1 mounted on a multilayer printed wiring board.