JPH11204560A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device the reliability of which is high and a method for manufacturing this for preventing disconnection of a metallic wiring, die to a thermal stress or the like. SOLUTION: A semiconductor device is provided with a low elastic modulus layer 20, having an opening at which the electrode of a semiconductor chip 10 is exposed, resin layer 15 interposed between the semiconductor chip 10 and the low elastic modulus layer 20, pad 30 provided on the electrode of the semiconductor chip 10, land 32 provided on the low elastic modulus layer 20, metallic wiring 31 for connecting the land 32 with the pad 30, a solder resist 50 on which the land 32 is opened, and metallic ball 4 provided on the land 32. The resin layer 15 has elastic modulus between the respective elastic moduli of the semiconductor chip 10 and that of the low elastic modulus layer 20, as well as a thermal expansion coefficient between the respective thermal expansion coefficients of the semiconductor ship 10 and that of the low elastic modulus layer 20.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a semiconductor element such as a transistor, and more particularly to a semiconductor device capable of securing reliability of connection with an external device and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, as electronic devices have become smaller and more sophisticated, semiconductor devices have been required to be smaller, denser and faster. For this reason, for example, LOC (lead-on-chip) or SON (small outline non-lead) is used as a memory package.
ΜBG using TAB tape
A (Micro ball grid array)
No. 6-504408).

A conventional semiconductor device called μBGA and a method of manufacturing the same will be described below with reference to FIG. FIG. 5 is a cross-sectional view showing a conventional semiconductor device called μBGA. In FIG. 5, reference numeral 101 denotes a semiconductor chip having a built-in semiconductor element such as a transistor; 102, a wiring circuit sheet provided on the semiconductor chip 101;
3 is a flexible low elastic modulus material interposed between the semiconductor chip 101 and the wiring circuit sheet 102; 104 is a partial lead of the wiring circuit sheet 102; 105 is an electrode of the semiconductor chip 101;
And an external electrode for connecting the semiconductor device to the outside. As shown in FIG. 5, a semiconductor device called μBGA has a low elastic modulus material 1 on a semiconductor chip 101.
The wiring circuit sheet 102 has a structure in which the wiring circuit sheet 102 is bonded to the semiconductor chip 101 via an external lead 106 and the external electrode 106 of the wiring circuit sheet 102 is electrically connected through a partial lead 104. .

Next, a method of manufacturing a conventional semiconductor device called μBGA will be described with reference to FIG. First, the external electrode 106 and the external electrode 106 are formed on the semiconductor chip 101.
The wiring circuit sheet 102 having the partial leads 104 extending from the substrate is joined via the low elastic modulus material 103.
The low elastic modulus material 103 is an insulating material and has an adhesive function. Next, the partial lead 104 and the electrode 105 are connected by a conventional thermocompression bonding technique or an ultrasonic bonding technique which is usually used when electrically connecting in a “TAB” (tape automated bonding) operation.
By the above method, a semiconductor device called μBGA has been manufactured.

[0005]

However, according to the above-described conventional semiconductor device, the semiconductor chip 101 and the low elastic modulus material 103 have greatly different elastic moduli, so that the interface between the semiconductor chip 101 and the low elastic modulus material 103 is large. Stress was concentrated on As a result, cracks in the low elastic modulus material 103 and separation between the semiconductor chip 101 and the low elastic modulus material 103 occurred, and a highly reliable semiconductor device could not be obtained.

An object of the present invention is to solve the above conventional problems and to provide a semiconductor device having high reliability and a method of manufacturing the same.

[0007]

According to the present invention, there is provided a semiconductor device according to the present invention, and a method for manufacturing a semiconductor device according to the present invention. We have taken steps on how to do it.

According to a first aspect of the present invention, there is provided a semiconductor chip having an electrode on a main surface, and a low elastic modulus layer provided on the semiconductor chip and exposing the electrode. A resin layer interposed between the low-modulus layer and the semiconductor chip; and a metal wiring provided at least in part on the low-modulus layer and connected to an electrode.

Thus, a low elastic modulus layer provided with an opening in the electrode, a resin layer interposed between the low elastic modulus layer and the semiconductor chip, and a connection to the electrode provided on the low elastic modulus layer A semiconductor device comprising a semiconductor chip having a metal wiring to be obtained. Therefore, a structure in which the stress generated between the semiconductor chip and the low elastic modulus layer is absorbed by the resin layer becomes possible.

[0010] As described in claim 2, in the semiconductor device of claim 1, an external electrode terminal connected to a metal wiring can be further provided.

Thus, signals can be reliably input and output between the semiconductor device and the external equipment via the external electrode terminals.

According to a third aspect of the present invention, in the semiconductor device of the second aspect, a protruding electrode provided on the external electrode terminal can be further provided.

Thus, signals can be more reliably input and output between the semiconductor device and the external device via the protruding electrodes.

According to a fourth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, a predetermined pattern is provided on a flexible insulating sheet which is provided on the low elastic modulus layer. And a partial lead derived from the wiring on the wiring circuit sheet and connected to the electrode on the semiconductor chip.

This also enables a structure in which the stress generated between the semiconductor chip and the low elastic modulus layer is absorbed by the resin layer.

According to a fifth aspect of the present invention, in the semiconductor device according to any one of the first to fourth aspects, the elastic modulus of the resin layer is lower than the elastic modulus of the semiconductor chip and that of the low elastic modulus layer. Preferably it has a value.

Thus, the stress generated due to the difference in the elastic modulus between the semiconductor chip and the low elastic modulus layer with respect to the received external force causes the resin layer having an intermediate elastic modulus between the semiconductor chip and the low elastic modulus layer. Is absorbed by Therefore, the disconnection of the metal wiring can be prevented, and the influence of stress on the external electrode terminals and the protruding electrodes connected to the external devices can be reduced,
And it can prevent the separation between the semiconductor chip and the low elastic modulus layer,
A highly reliable semiconductor device can be obtained.

According to a sixth aspect of the present invention, in the semiconductor device according to any one of the first to fourth aspects, the coefficient of thermal expansion of the resin layer is equal to the coefficient of thermal expansion of the semiconductor chip and that of the low elastic modulus layer. It is preferred to have a value between.

Accordingly, the thermal stress generated due to the difference in the thermal expansion coefficient between the semiconductor chip and the low elastic modulus layer with respect to the received heat causes the intermediate thermal expansion coefficient between the semiconductor chip and the low elastic modulus layer to decrease. Absorbed by the resin layer. Therefore,
High reliability that can prevent disconnection of metal wiring, reduce the effect of thermal stress on external electrode terminals and protruding electrodes connected to external devices, and prevent peeling of the semiconductor chip from the low elastic modulus layer The semiconductor device having the above is obtained.

According to a seventh aspect of the present invention, in the semiconductor device according to any one of the first to sixth aspects, the low-elastic-modulus layer is formed such that the semiconductor layer is formed at the end of the portion where the electrode is exposed from the upper surface of the low-elastic-modulus layer. It is further preferable that a wedge-shaped inclined portion extending to the main surface of the chip is provided.

As a result, the metal wiring is formed on the wedge-shaped inclined portion of the low elastic modulus layer, so that stress concentration at the interface between the semiconductor chip and the low elastic modulus layer is reduced, and exposure and the like are performed. This facilitates wiring formation. Therefore, the metal wiring can be miniaturized.

The first method of manufacturing a semiconductor device according to the present invention is as follows.
9. A step of forming a resin film on a semiconductor chip having electrodes, a step of forming a first opening in the resin film so as to expose the electrodes,
Forming an insulating film having a low elastic modulus on the resin film on which the opening is formed and the exposed semiconductor chip;
Forming a second opening in the insulating film so as to expose the electrode; and forming a metal wiring connected to the electrode and extending over the insulating film.

According to this method, a resin layer and an insulating film having a low elastic modulus are sequentially formed by opening an electrode, and a metal wiring connected to the electrode and extending over the insulating film is formed. A semiconductor device having a structure in which a stress generated between a chip and a low elastic modulus layer is absorbed by a resin layer can be manufactured.

According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device according to the eighth aspect, an opening is provided above the external electrode terminal connected to the metal wiring, and the external electrode terminal is connected to an external device. And a step of forming a protective film having a property of repelling a conductive material for electrically connecting the conductive film and the conductive material.

According to this method, since the metal wiring is protected by the protective film, there is less danger of disconnection or the like at the time of soldering and the like, and a short circuit between adjacent external electrode terminals can be prevented. A semiconductor device having the same can be manufactured.

According to a tenth aspect of the present invention, in the method for manufacturing a semiconductor device according to the eighth or ninth aspect, a metal made of one of Au, Pd, and solder is provided on the external electrode terminal connected to the metal wiring. The method may further include a step of forming a film.

According to this method, the wettability of the solder is improved by the formed metal film, so that a highly reliable semiconductor device that is more reliably connected to an external device can be manufactured.

According to an eleventh aspect of the present invention, the method for manufacturing a semiconductor device according to the eighth or ninth aspect may further include a step of forming a protruding electrode on the external electrode terminal connected to the metal wiring.

According to this method, it is possible to manufacture a highly reliable semiconductor device that is more reliably connected to an external device by the formed protruding electrodes.

[0030]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a perspective view showing the semiconductor device according to the present embodiment with a part of a solder resist opened. FIG.
In the figure, reference numeral 10 denotes a semiconductor chip which is obtained by dividing a semiconductor wafer made of, for example, silicon and which incorporates a semiconductor integrated circuit made of semiconductor elements such as transistors. At the center of the main surface of the semiconductor chip 10, a pad 30 connected to an electrode (not shown) of the semiconductor chip 10 is arranged. A passivation film (not shown) is provided on a portion of the main surface of the semiconductor chip 10 other than the electrodes. On the main surface of the semiconductor chip 10, a pad 30 is provided on an exposed electrode (not shown) of the semiconductor chip 10 at a central portion, and the pad 30 is exposed to cover a portion other than the central portion. And a resin layer 15 made of an insulating material. On the resin layer 15, a low elastic modulus layer 20 made of an insulating material having low elasticity is provided so as to expose the pad 30. The low elastic modulus layer 20 has a wedge-shaped cross-sectional shape that is inclined with respect to the central portion on the main surface on which the pads 30 are arranged. Here, the elastic modulus of the resin layer 15 has an intermediate value between the elastic moduli of the semiconductor chip 10 and the low elastic modulus layer 20. The coefficient of thermal expansion of the resin layer 15 is
0 and the low elastic modulus layer 20 have intermediate values of the thermal expansion coefficients respectively.

A land 32 which is an external electrode terminal for inputting / outputting a signal between the semiconductor chip 10 and an external device is formed on the flat portion of the low elastic modulus layer 20.
2 and the pad 30 are connected via a metal wiring 31. That is, the metal wiring 31 is formed over the slope having the wedge-shaped cross-sectional shape of the low elastic modulus layer 20.
A solder resist 50 is formed on a portion other than the land 32 on the semiconductor chip. On the land 32, a metal ball 40 which is a protruding electrode is provided. That is, the metal ball 40 is bonded to the land 32 exposed at the opening of the solder resist 50.

As described above, according to the semiconductor device of the present embodiment, the external electrode terminals formed on the low elastic modulus layer 20 are used instead of the connection using the partial leads of the conventional wiring circuit sheet. The land 32 is connected to an electrode (not shown) via the metal wiring 31 formed over the slope of the low elastic modulus layer 20. Therefore, a semiconductor device which is a small and thin semiconductor device, is suitable for fine processing of wiring, and can cope with increase in the number of pins is realized.

The semiconductor device according to the present embodiment has a structure in which the resin layer 15 and the low elastic modulus layer 2 formed sequentially on the semiconductor chip 10 are formed.
A land 32 and a metal wiring 31 are formed on the lands 0, and a metal ball 40 is bonded on the land 32.

The elastic modulus of the resin layer 15 has an intermediate value between the elastic moduli of the semiconductor chip 10 and the low elastic modulus layer 20, and the coefficient of thermal expansion of the resin layer 15 is
0 and the low elastic modulus layer 20 have intermediate values of the thermal expansion coefficients respectively. Therefore, when the semiconductor device is mounted on the substrate and after the substrate is mounted, deformation of the semiconductor chip and the substrate such as warpage can be reduced. That is, since the stress such as thermal stress is absorbed by the resin layer 15, the disconnection of the metal wiring 31 can be prevented, the influence of the stress on the metal ball 40 can be reduced, and the semiconductor chip 10
Therefore, a semiconductor device having high reliability can be realized.

The method of manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS. FIG.
(A) to (e) and FIGS. 3 (a) and (b) correspond to FIG.
FIG. 14 is a cross-sectional view showing a manufacturing step of the semiconductor device of FIG.

First, as shown in FIG. 2A, a resin made of a photosensitive insulator is applied on the electrode 11 and the passivation film 12 formed on the main surface of the semiconductor chip 10. After drying, the resin film 16 is formed.

Next, as shown in FIG.
Exposure and development are sequentially performed on 6 to form a resin layer 15 in which the electrode 11 is opened. In this case,
For example, the cross-sectional shape of the resin layer 15 at the opening is formed not in the direction perpendicular to the electrode 11 but in a tapered shape by using scattered light instead of parallel light in the exposure.

Next, as shown in FIGS. 2C and 2D, the low elastic modulus layer 20 is formed from the insulating material 21 by the same method as the formation of the resin layer 15. As in the case of forming the resin layer 15, for example, by using scattered light instead of parallel light in the exposure, the cross-sectional shape of the low elastic modulus layer 20 at the opening is tapered rather than perpendicular to the electrode 11. Form. Examples of the photosensitive material for forming the resin layer 15 and the low elastic modulus layer 20 include polyimide,
Any resin having an insulating property such as epoxy may be used.
In particular, as the insulating material 21 for forming the low elastic modulus layer 20, a material having a lower elastic modulus and a lower thermal expansion coefficient than those of the resin layer 15 is used.

Next, as shown in FIG. 2E, a metal thin film layer made of, for example, Ti / Cu is formed on the entire main surface of the semiconductor chip 10 by vacuum evaporation, sputtering, CVD or electroless plating. Is formed, the metal thin film layer is patterned. Thus, a predetermined wiring pattern including the pads 30, the lands 32, and the metal wirings 31 is formed on the main surface of the semiconductor chip 10. The wiring pattern is determined in consideration of the number of pads 30, that is, the number of pins and the area of the semiconductor chip 10.

The patterning is performed as follows.
A photosensitive resist is applied on the metal thin film layer, and the resist other than a predetermined pattern portion is cured by exposure, and then the resist in the pattern portion is removed. A metal layer having a large thickness, for example, made of Cu is formed on the pattern portion by using electrolytic plating, and then the resist is melted and removed. Thereafter, a predetermined wiring pattern is formed by immersing the metal thin film layer in an etchant and leaving the metal layer having a large thickness.

A metal film is deposited on the entire surface, a resist is applied thereon, and a resist for an etching mask is formed on a predetermined pattern portion by using a photolithography technique, and this resist is used as a mask. The wiring pattern may be formed by etching the metal layer.

Next, as shown in FIG. 3A, after applying a photosensitive solder resist on the low elastic modulus layer 20,
The solder resist 50 is formed using a photolithography technique so that only the land 32 is exposed. The solder resist 50 protects the pad 30 and the metal wiring 31 which are parts other than the land 32 in the wiring pattern from solder melted in a later step.

Next, as shown in FIG.
A metal ball 40 made of copper, nickel, or the like, or made of solder-plated metal is placed on the land 32,
The metal ball 40 and the land 32 are fusion-bonded. Through the above steps, the semiconductor device according to the present embodiment can be obtained.

According to the method of manufacturing a semiconductor device of the present embodiment, on the main surface of the semiconductor chip 10, the low-modulus layer 20 in which the electrode 11 is opened is formed in a tapered cross section. This makes it possible to form a structure in which the metal wiring 31 can be easily formed over the slope of the low elastic modulus layer 20 and the metal wiring 31 is not easily disconnected.

In this embodiment, the metal wiring 31 is formed on the low elastic modulus layer 20 provided on the semiconductor chip 10 via the resin layer 15. Instead of this, a wiring circuit sheet provided on the similarly provided low elastic modulus layer 20 and provided with a wiring of a predetermined pattern on a flexible insulating sheet, and a wiring circuit sheet on the wiring circuit sheet The electrodes on the semiconductor chip and the partial leads may be connected using the partial leads derived from the wiring.

In contrast to the semiconductor device of this embodiment, according to the conventional semiconductor device of FIG.
Since it is necessary to create the data, the number of manufacturing steps increases. Also,
The wiring circuit sheet 102 is expensive, and the semiconductor chip 10
1 requires a high-performance mounter (mounting equipment) in order to connect the wiring circuit sheet 102, and thus the material cost and the equipment cost were inevitably increased. Also, the electrode 105
And partial lead 104 extending from wiring circuit sheet 102
In particular, in the case of fine wiring, there is a disadvantage that the width and thickness of the partial lead 104 become small and the shape becomes unstable, so that the connection between the partial lead 104 and the electrode 105 becomes difficult. Was.

(Second Embodiment) A semiconductor device according to a second embodiment of the present invention will be described with reference to FIG. 4A is a perspective view illustrating the semiconductor device according to the present embodiment, and FIG. 4B is a cross-sectional view taken along line IV-IV in FIG. In FIGS. 4A and 4B, reference numeral 10 denotes a semiconductor chip which is obtained by dividing a semiconductor wafer made of, for example, silicon and which incorporates a semiconductor integrated circuit made of a semiconductor element such as a transistor. Semiconductor chip 1
A resin layer 15 and a low-elasticity layer 20 made of an insulating material having low elasticity are sequentially formed on the main surface 0 so that the electrode 11 is opened and the central portion is raised flat. Here, the elastic modulus of the resin layer 15 has an intermediate value between the elastic moduli of the semiconductor chip 10 and the low elastic modulus layer 20. Further, the thermal expansion coefficient of the resin layer 15 has an intermediate value between the thermal expansion coefficients of the semiconductor chip 10 and the low elastic modulus layer 20, respectively. The metal wiring 31 is a wiring formed of a metal layer formed over the main surface of the semiconductor chip 10 and the low elastic modulus layer 20 and connected to the electrode 11 of the semiconductor chip 10. The land 32 is formed of the low elastic modulus layer 20.
And an external electrode terminal connected to the electrode 11 via the metal wiring 31. The surface of the land 32 has A
It is desirable that a metal coating made of u, Pd, solder or the like and having good solder wettability be formed.

According to the semiconductor device of this embodiment, the lands 32 which are external electrode terminals formed on the low elastic modulus layer 20 are low in place of the conventional connection of the electrodes by the partial leads of the wiring circuit sheet. It is connected to the electrode 11 via a metal wiring 31 formed over the elastic modulus layer 20. Therefore, a small and thin semiconductor device is realized.

The elastic modulus of the resin layer 15 has an intermediate value between the elastic modulus of the semiconductor chip 10 and the elastic modulus of the low elastic modulus layer 20, and the coefficient of thermal expansion of the resin layer 15 is lower than that of the semiconductor chip 10. Since the elastic modulus layer 20 has an intermediate value between the thermal expansion coefficients of the respective elastic modulus layers 20, the influence of thermal stress when the semiconductor device is mounted on the substrate can be reduced. That is, by absorbing the thermal stress by the resin layer 15, a semiconductor device having high reliability when mounted on a substrate is realized.

A method for manufacturing a semiconductor device according to the present embodiment will be described with reference to FIG.

First, the electrode 11 formed on the main surface of the semiconductor chip 10 is opened by the same method as in the first embodiment, and the resin layer 15 having a tapered cross section is opened.
And the low elasticity layer 20 are sequentially formed.

Next, a metal thin film layer made of, for example, Ti / Cu is formed on the entire main surface of the semiconductor chip 10 by a vacuum evaporation method, a sputtering method, a CVD method or an electroless plating method. Then, patterning is performed.

Patterning is performed in the same manner as in the first embodiment to form a predetermined wiring pattern. Through the above steps, the semiconductor device according to the present embodiment can be obtained.

If necessary, a metal plating made of Au, Pd, solder, or the like and having good solder wettability may be applied to the surface of the land 32.

On the main surface of the semiconductor chip 10,
A region other than the land 32 can be covered with a solder resist so that the land 32 is exposed.

According to the method of manufacturing a semiconductor device of the present embodiment, a semiconductor device having high reliability when the semiconductor device is mounted on a substrate can be manufactured without requiring a step of forming a metal ball.

In each of the embodiments described above, in order to form the resin layer 15 and the low elastic modulus layer 20, respectively, the photosensitive resin 31 and the insulating material 2 are used.
1 was applied. However, the present invention is not limited thereto, and a photosensitive insulating material formed in a film shape in advance may be used. In this case, after the film-shaped insulating material is bonded onto the semiconductor chip 10, exposure and development are performed to expose the electrodes 11 of the semiconductor chip 10.

Further, an insulating material having no photosensitivity can be used. In this case, the electrodes 11 of the semiconductor chip 10 are exposed by mechanical processing such as laser or plasma, or chemical processing such as etching.

Although Ti / Cu is used for the metal thin film layer, Cr, W, Cu, Ni or the like may be used instead.

[0060]

According to the first to seventh aspects of the present invention, the resin layer provided between the semiconductor chip and the low elastic modulus layer absorbs the stress between the semiconductor chip and the low elastic modulus layer. In addition, the influence of stress such as thermal stress is reduced. Therefore, it is possible to prevent the disconnection of the metal wiring, reduce the influence of these stresses on the external electrode terminals and the protruding electrodes connected to the external devices, and prevent the separation of the semiconductor chip from the low elastic modulus layer. A semiconductor device having reliability can be obtained.

According to the invention of claims 8 to 11, as a method of manufacturing a semiconductor device, an electrode is opened, a resin layer and an insulating film having a low elastic modulus are sequentially formed, and then connected to the electrode. Metal wiring extending over the insulating film is formed. Therefore, a highly reliable semiconductor device having a structure in which the stress generated between the semiconductor chip and the low elastic modulus layer is absorbed by the resin layer can be manufactured.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present invention with a part of a solder resist opened.

FIGS. 2A to 2E are cross-sectional views each showing a manufacturing process of the semiconductor device of FIG. 1;

FIGS. 3A and 3B are cross-sectional views illustrating the steps of manufacturing the semiconductor device of FIG. 1;

FIG. 4A is a perspective view illustrating a semiconductor device according to a second embodiment of the present invention, and FIG. 4B is a cross-sectional view taken along line IV-IV of FIG.

FIG. 5 is a cross-sectional view showing a conventional semiconductor device using a low elastic modulus material.

[Description of Reference Numerals] 10 semiconductor chip 11 electrode 12 passivation film 15 resin layer 16 resin film 20 low elastic modulus layer 21 insulating material (insulating film) 30 pad 31 metal wiring 32 land (external electrode terminal) 40 metal ball (protruding electrode) ) 50 Solder resist (protective film)

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Yoshifumi Nakamura 1-1, Sachimachi, Takatsuki-shi, Osaka Matsushita Electronics Corporation

Claims (11)

[Claims] A semiconductor chip having an electrode on a main surface thereof; a low elastic modulus layer provided on the semiconductor chip, exposing the electrode; and a low elastic modulus layer interposed between the low elastic modulus layer and the semiconductor chip. A semiconductor device comprising: a resin layer; and a metal wiring at least partially provided on the low-modulus layer and connected to the electrode. 2. The semiconductor device according to claim 1, further comprising an external electrode terminal connected to said metal wiring. 3. The semiconductor device according to claim 2, further comprising a protruding electrode provided on said external electrode terminal. 4. The semiconductor device according to claim 1, wherein a wiring of a predetermined pattern is provided on the flexible insulating sheet, which is provided on the low elasticity layer. A semiconductor device, further comprising: a wiring circuit sheet comprising: a wiring; and a partial lead derived from wiring on the wiring circuit sheet and connected to an electrode on the semiconductor chip. 5. The semiconductor device according to claim 1, wherein an elastic modulus of the resin layer has a value between elastic moduli of the semiconductor chip and the low elastic modulus layer. A semiconductor device characterized by the above-mentioned. 6. The semiconductor device according to claim 1, wherein a thermal expansion coefficient of the resin layer is a value between thermal expansion coefficients of the semiconductor chip and the low elastic modulus layer. A semiconductor device comprising: 7. The semiconductor device according to claim 1, wherein said low-modulus layer is formed at an end of a portion where said electrode is exposed from an upper surface of said low-modulus layer. A semiconductor device comprising a wedge-shaped inclined portion extending to a main surface. 8. A step of forming a resin film on a semiconductor chip having electrodes, a step of forming a first opening in the resin film so as to expose the electrodes, and wherein the first opening is Forming an insulating film having a low elastic modulus on the formed resin film and the exposed semiconductor chip; forming a second opening in the insulating film so as to expose the electrode; Forming a metal wiring connected to the electrode and extending on the insulating film. 9. The method for manufacturing a semiconductor device according to claim 8, wherein an opening is provided above the external electrode terminal connected to the metal wiring, and the external electrode terminal is electrically connected to a connection terminal of an external device. Forming a protective film having a property of repelling a conductive material for manufacturing the semiconductor device. 10. The method of manufacturing a semiconductor device according to claim 8, wherein Au, Pd, or Au is provided on an external electrode terminal connected to the metal wiring.
Or a method of manufacturing a semiconductor device, further comprising a step of forming a metal film made of any one of solder. 11. The method of manufacturing a semiconductor device according to claim 8, further comprising a step of forming a protruding electrode on an external electrode terminal connected to the metal wiring. .