JPS63170905A - Manufacture of thick film resistor - Google Patents
Manufacture of thick film resistorInfo
- Publication number
- JPS63170905A JPS63170905A JP62003068A JP306887A JPS63170905A JP S63170905 A JPS63170905 A JP S63170905A JP 62003068 A JP62003068 A JP 62003068A JP 306887 A JP306887 A JP 306887A JP S63170905 A JPS63170905 A JP S63170905A
- Authority
- JP
- Japan
- Prior art keywords
- thick film
- trimming
- resistor
- overcoat glass
- film resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 238000009966 trimming Methods 0.000 claims description 28
- 239000011521 glass Substances 0.000 claims description 25
- 238000000137 annealing Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 5
- 238000001035 drying Methods 0.000 claims description 3
- 238000010304 firing Methods 0.000 claims description 2
- 239000004020 conductor Substances 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、混成集積回路等忙おける厚膜抵抗の製造方法
に関し、更に詳細には、抵抗体のトリミング方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing thick film resistors in hybrid integrated circuits and the like, and more particularly to a method for trimming resistors.
厚膜抵抗を次の（１）〜（４１の工程で形成てることは
既忙知らｒしている。It is well known that the thick film resistor is formed in the following steps (1) to (41).
（１１絶縁基板上に銀パラジウム等の導体ペーストを印
刷し、乾燥し、焼成し、て電極導体を形成する。(11) Print a conductor paste such as silver palladium on an insulating substrate, dry it, and bake it to form an electrode conductor.
（２）抵抗ペーストγ印＃ＩＬ、乾燥し、焼成して厚膜
抵抗体ケ形成する。(2) The resistor paste γ mark #IL is dried and fired to form a thick film resistor.
（３） オーバーコートガラスペーストｙ印刷し、。(3) Print overcoat glass paste.
乾燥し、焼成してオーバーコートガラス膜ケ形成する。Dry and bake to form an overcoat glass film.
＋４１ ｐＪえはレーザートリミング釦よって抵抗値
をＦｉ１ｍ整する。For +41 pJ, use the laser trimming button to adjust the resistance value to Fi1m.
ところで、上記（４１のトリミング工程を上記（３）の
オーバーコートガラス膜形成前に移丁ことが考えられる
が、トリミングヶ行−ノた後にオーバーコ−トガラス膜
を形成すると、抵抗値が変化［７てし！５ｏ従って従来
方法では、オーバーコートガラス膜を形成した後にトリ
ミング時行っている。By the way, it is conceivable to perform the trimming step (41) before forming the overcoat glass film (3) above, but if the overcoat glass film is formed after the trimming process, the resistance value will change [7]. Therefore, in the conventional method, trimming is performed after forming the overcoat glass film.
〔発明が解決Ｌ７ようとする問題点〕
しかし、オーバーコートガラス膜形成後にトリミングを
行うと、抵抗体に発生しているマイクロクラックや抵抗
体の削りカス等が好時文は温度によって質化し、トリミ
ング時に抵抗値が許容範囲に入っていても、その後許容
範囲から外れることがある。[Problem that the invention attempts to solve L7] However, when trimming is performed after the overcoat glass film is formed, microcracks that have occurred in the resistor, shavings of the resistor, etc. are deteriorated due to temperature. Even if the resistance value is within the allowable range at the time of trimming, it may fall out of the allowable range afterwards.
そこで、不発明の目的は、安定性の艮い厚膜抵抗を得る
ことができる製造方法ケ提供することにある。SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide a manufacturing method capable of obtaining a thick film resistor with excellent stability.
上記問題点を解決し、上記目的を達成するための本発明
は、ｐ縁基板上に厚膜抵抗体を形成する工程と、前記厚
膜抵抗体を所定抵抗値よジも幾らか小ざい値筐で粗トリ
ｉングする工程と、前記粗トリミングした前記＊ａ抵抗
体上にオーバーコートガラス膜を形成する工程と、前記
オーバーコートガラス膜を弁］−て前ｉピ厚膜抵抗体を
所望抵抗値になるように再トリミングする工程とからな
ろ厚膜抵抗の製造方法に係わるものである。In order to solve the above problems and achieve the above objects, the present invention includes a step of forming a thick film resistor on a p-edge substrate, and a step of forming the thick film resistor to a value slightly smaller than a predetermined resistance value. a step of roughly trimming with a housing, a step of forming an overcoat glass film on the roughly trimmed *a resistor, and a step of applying the overcoat glass film to the desired thick film resistor. This relates to a method of manufacturing a thick film resistor, including a step of re-trimming to obtain the desired resistance value.
上Ｈピ発明では、オーバーコートガラス膜形成前に粗ト
リミングすることによって生じた１イクロクラツク及び
抵抗体の削りカスはオーバーコートガラス膜形成時の焼
成によって固足され、抵抗値の経時９化が少なくなる。In the above Hpi invention, microcracks and shavings of the resistor caused by rough trimming before forming the overcoat glass film are fixed by baking during the formation of the overcoat glass film, so that the resistance value does not change much over time. Become.
オーバーコートガラス膜形成後における微ＮＡ整のトリ
ミングにおいては。In trimming for fine NA adjustment after forming the overcoat glass film.
従来と同様に抵抗体にヌトレスが加わるが、トリｉング
量が少ないので、抵抗値の経時変化に対する影響は少な
い。Nutres is added to the resistor as in the conventional case, but since the amount of trimming is small, there is little effect on the change in resistance value over time.
次に、第１図及び第２図を参照（−て本発明の実施例に
係わる混成集積回路における厚膜抵抗体の製造方法ケ説
明する。Next, a method for manufacturing a thick film resistor in a hybrid integrated circuit according to an embodiment of the present invention will be explained with reference to FIGS. 1 and 2.
筐ス、セラミック基叛］の上に釦パラジウム導体ペース
トンＰ９ｒ定パターンに臼刷し、１５０℃。The button palladium conductor pasteton P9r was printed in a fixed pattern on the casing and ceramic substrate, and heated at 150°C.
１０分乾燥し、８５０℃、１０分焼成することによって
第１図（４）及び第２図（４）に示す電極導体２゜３を
形成する。The electrode conductor 2.3 shown in FIG. 1 (4) and FIG. 2 (4) is formed by drying for 10 minutes and baking at 850° C. for 10 minutes.
次に、酸化ルテニウムを含む抵抗体ペーストを対の電極
導体２，３を接続するように印桐し。Next, a resistor paste containing ruthenium oxide is applied so as to connect the pair of electrode conductors 2 and 3.
１５０℃、１０分乾燥し、８５０℃、１０分焼成するこ
とによって第１図（４）及び第２図＜ＡＪＫ示す厚膜抵
抗体４を形成する。厚膜抵抗体４の浮づは約２０μｍ、
＠及び長さはそれぞれ１ｍｍ、抵抗値は約２３〜２７に
Ωである。By drying at 150° C. for 10 minutes and baking at 850° C. for 10 minutes, the thick film resistor 4 shown in FIG. 1 (4) and FIG. 2 <AJK is formed. The thickness of the thick film resistor 4 is approximately 20 μm.
The length and length are each 1 mm, and the resistance value is approximately 23 to 27 Ω.
次に、Ｒｔ終的目標抵抗値５０にΩ±０．１％を得るた
めに、粗トリミング（第１０トリミング）を行５゜粗ト
リミングの目標値は、最終目標値の−０，５〜−５，０
％の範囲にすることが望ましく。Next, in order to obtain the Rt final target resistance value 50 of Ω±0.1%, coarse trimming (10th trimming) is performed.The target value of the coarse trimming is -0,5 to - 5,0
It is desirable to set it in the range of %.
この例では一１％とした。従って、粗トリミングの目標
抵抗値は４９．５にΩ±１％である。この粗ト１７ ｔ
ングは１例えは１５ ｍｍ／ｓの比較的速いトリミング
ｙ：！、ｉで行う。この例ではパワー１．５Ｗ。In this example, it was set at 11%. Therefore, the target resistance value for rough trimming is 49.5Ω±1%. This coarse 17t
For example, relatively fast trimming of 15 mm/s:! , i. In this example, the power is 1.5W.
周波数３ｋｈｚでレーザートリばングを行い、第１図■
及び第２図＜Ｂノに示す如く厚膜抵抗体４に切削溝５を
約０．６６ ｍｍの長さに形成した。Laser tribulation was performed at a frequency of 3kHz, and Figure 1
As shown in FIG. 2B, cut grooves 5 having a length of about 0.66 mm were formed in the thick film resistor 4.
次に、Ｊｓ膜抵抗体４の上に、オーバーコートガラスペ
ーストｙ印桐し、１５０℃、１０分乾燥し。Next, an overcoat glass paste was applied on the Js film resistor 4 and dried at 150° C. for 10 minutes.
５００℃、１０分焼成し、更に温度ヤイクんを伴うアニ
ーリング処理を施して第１図（Ｃ）及び第２図りに示す
例文、ばＰｈＯｉ多く含有するほうけい酸鉛ガラスから
成るオーバーコートガラス膜６を形成する。特性の安定
化ケ図るためのアニーリングの温度サイクルは、−５５
℃）ｋ３０分間維持、５分間を要して、−５５℃から＋
１２５℃まで昇温。After baking at 500°C for 10 minutes and further annealing with a temperature increase, an overcoat glass film 6 made of lead borosilicate glass containing a large amount of PhOi is obtained, as shown in Figures 1 (C) and 2. form. The annealing temperature cycle to stabilize the characteristics is -55
℃)K maintained for 30 minutes, took 5 minutes to rise from -55℃ to +
Raise the temperature to 125℃.
＋１２５℃を３０分間維持、５分間を要して＋１２５℃
から一５５℃テで降温″４ｒ：１サイクルとするもので
ある。このアニーリング処理により。Maintained +125℃ for 30 minutes, took 5 minutes to reach +125℃
By this annealing treatment, the temperature is lowered from 1 to 55° C. in 4r:1 cycle.
抵抗体４の値はアニーリング前よりは約１．５％低くな
る。The value of resistor 4 is approximately 1.5% lower than before annealing.
次に、最終的目標抵抗値５０にΩ±０．１％を得るよう
にレーザートリミングを行い、抵抗値を微−整する。こ
の微調整トリミング（第２回トリミング）は１例えばパ
ワー１．５Ｗ、周波数３ｋｈｚ、速度１０ｍｍ／ｓ（低
迷度）で行い、第】回目の切削溝５とは異なる位置に切
削溝７を形成する。第２図０から明らかなｌＯ〈この第
２回目のトリミングはオーバーコートガラス膜６の上か
ら行われ。Next, laser trimming is performed to finely adjust the resistance value so as to obtain the final target resistance value 50 of Ω±0.1%. This fine adjustment trimming (second trimming) is performed at, for example, a power of 1.5 W, a frequency of 3 kHz, and a speed of 10 mm/s (low stability), and the cutting groove 7 is formed at a different position from the cutting groove 5 of the 1st trimming. . It is clear from FIG. 2 that the second trimming is performed from above the overcoat glass film 6.
オーバーコートガラス膜６と抵抗体４との両方が切削さ
れる。レーザービームを投゛射すると、オーバーコート
ガラス膜６及び抵抗体４が溶融及び蒸発し、切削溝７が
生じると共に、オーバーコートガラスＭ６の一部が流動
して抵抗体４の表面を覆う。このため、切削溝７におい
て抵抗体４が直接に露出しない。Both overcoat glass film 6 and resistor 4 are cut. When the laser beam is projected, the overcoat glass film 6 and the resistor 4 are melted and vaporized, cutting grooves 7 are formed, and a portion of the overcoat glass M6 flows to cover the surface of the resistor 4. Therefore, the resistor 4 is not directly exposed in the cutting groove 7.
上述の如く第１回と第２回とに分けてトリばングしたも
のに、アニーリングと同一の温度サイクルを１００加え
た後の抵抗値変化を測定したところ、＋０．０１％であ
ったウ一方、オーバーコートガラス膜形成後にトリミン
グを行った従来の厚膜抵抗に同様な温度サイクルを加え
て、抵抗値変化を測定したところ１本実施例のものより
も大幅に大きい＋０．２％であった。When we measured the change in resistance after applying 100 cycles of the same temperature as annealing to the first and second tribungs as described above, we found that it was +0.01%. A similar temperature cycle was applied to a conventional thick film resistor that was trimmed after the overcoat glass film was formed, and the change in resistance value was measured, and it was found to be +0.2%, which was significantly larger than that in this example. .
本実施例によｎば、第１回のトリミングによるマイクロ
クランク及び抵抗体の削りカスなどがオーバーコートガ
ラス膜の焼成によって固定はｎるため、及び第１回のト
リミングによって生じる抵抗体４のストレスがオーバー
コートガラス膜の焼故によって緩和されるため、及び温
度サイクルを伴うアニーリング処理で特性の安定化か図
られた後にトリミングを行うために、抵抗値の経時量化
及び温度サイクルによる変化を少なくすることができる
。According to this embodiment, the micro crank and the shavings of the resistor due to the first trimming are not fixed by firing the overcoat glass film, and the stress on the resistor 4 caused by the first trimming is This reduces the change in resistance value over time and due to temperature cycles, since this is alleviated by the burning of the overcoat glass film, and trimming is performed after the characteristics have been stabilized through an annealing process that involves temperature cycles. be able to.
本発明は上述の実施例に限定されるものでなく。 The invention is not limited to the embodiments described above.
変形可能なものである。例えば、サンドブラストトリミ
ングの場合にも適用可能である。It is deformable. For example, it is also applicable to sandblast trimming.
上述から明らかな如く１本発明によれは、安定性の艮い
厚膜抵抗を容易に作製することができる。As is clear from the above, according to the present invention, a highly stable thick film resistor can be easily manufactured.
第１図は本発明の実施例に保わる厚膜抵抗を製造工ｆｅ
４Ｊ＠に示す平面図。
第２図は第１図囚のり一り線に相当する部分を製造工程
順に示す断面図である。
１・・・セラミック基板、２．３・・・導体膜、４・・
・厚膜抵抗体、５・・・切削溝、６・・・オーバーコー
トガラス膜、７・・・切削溝つFIG. 1 shows a manufacturing process for a thick film resistor according to an embodiment of the present invention.
A plan view shown in 4J@. FIG. 2 is a cross-sectional view showing a portion corresponding to the glue line in FIG. 1 in the order of manufacturing steps. 1... Ceramic substrate, 2.3... Conductor film, 4...
・Thick film resistor, 5... Cutting groove, 6... Overcoat glass film, 7... Cutting groove
Claims (2)
厚膜抵抗体を所定抵抗値よりも幾らか小さい値まで粗ト
リミングする工程と、 前記粗トリミングした前記厚膜抵抗体上にオーバーコー
トガラス膜を形成する工程と、 前記オーバーコートガラス膜を介して前記厚膜抵抗体を
所望抵抗値になるように再トリミングする工程と からなる厚膜抵抗の製造方法。(1) a step of forming a thick film resistor on an insulating substrate; a step of roughly trimming the thick film resistor to a value somewhat smaller than a predetermined resistance value; A method for manufacturing a thick film resistor, comprising the steps of: forming an overcoat glass film; and re-trimming the thick film resistor to a desired resistance value through the overcoat glass film.
し、更に、所定の温度サイクルを伴うアニーリングを施
すことである特許請求の範囲第１項記載の厚膜抵抗の製
造方法。(2) The step of forming the overcoat glass film includes printing an overcoat glass paste, drying it, firing it, and further annealing it with a predetermined temperature cycle. A method for manufacturing thick film resistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62003068A JPS63170905A (en) | 1987-01-09 | 1987-01-09 | Manufacture of thick film resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62003068A JPS63170905A (en) | 1987-01-09 | 1987-01-09 | Manufacture of thick film resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63170905A true JPS63170905A (en) | 1988-07-14 |
Family
ID=11547012
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62003068A Pending JPS63170905A (en) | 1987-01-09 | 1987-01-09 | Manufacture of thick film resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63170905A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999003112A1 (en) * | 1997-07-09 | 1999-01-21 | Matsushita Electric Industrial Co., Ltd. | Resistor and method for manufacturing the same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5952804A (en) * | 1982-09-20 | 1984-03-27 | 富士通株式会社 | Method of producing film resistor |
-
1987
- 1987-01-09 JP JP62003068A patent/JPS63170905A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5952804A (en) * | 1982-09-20 | 1984-03-27 | 富士通株式会社 | Method of producing film resistor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999003112A1 (en) * | 1997-07-09 | 1999-01-21 | Matsushita Electric Industrial Co., Ltd. | Resistor and method for manufacturing the same |
| US6304167B1 (en) | 1997-07-09 | 2001-10-16 | Matsushita Electric Industrial Co., Ltd. | Resistor and method for manufacturing the same |
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