JPS5640949A - Parallel arithmetic processor - Google Patents

Abstract

PURPOSE: To carry out the same arithmetic process in a high speed to plural numbers of data for the information processor, by arranging plural numbers of the arithmetic parts and then providing the register to hold the instruction data plus the logic circuit to indicate the process function to each of the arithmetic parts.

CONSTITUTION: For the information processor consisting of four arithmetic parts 11W14, the instruction data is supplied to the register 41 through the data line 61, and then transferred to the register 42 after the unit time. At the same time, the subsequent instruction data is supplied to the register 41, and the registers 41W44 function as the shift registers. Thus the instruction data is transferred to the next stage with every unit time. The 16 bits among 24 bits of the register 41 are the data which decide the process function of the arithmetic circuit 21, the 4 bits are the data which vary the state of the operation control circuit 31, and the rest 4 bits are the data which inhibit the operation of the arithmetic circuit respectively. Then the arithmetic data is supplied through the common input bus 51, and the arithmetic output is delivered through the common output bus 52. And the clock is supplied through the clock line 53 to actuate the arithmetic circuit 21.

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