JPS5652440A - Arithmetic unit - Google Patents

Arithmetic unit

Info

Publication number
JPS5652440A
JPS5652440A JP12761679A JP12761679A JPS5652440A JP S5652440 A JPS5652440 A JP S5652440A JP 12761679 A JP12761679 A JP 12761679A JP 12761679 A JP12761679 A JP 12761679A JP S5652440 A JPS5652440 A JP S5652440A
Authority
JP
Japan
Prior art keywords
circuit
digits
clock
effective number
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12761679A
Other languages
Japanese (ja)
Inventor
Hirofumi Kasugai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12761679A priority Critical patent/JPS5652440A/en
Publication of JPS5652440A publication Critical patent/JPS5652440A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To shorten the operation time, by providing a circuit for deciding whether the effective number of digits of an operation data is large or small, and making a block cycle short and long when the effective number of digits is large and small, respectively, by a signal of a discrimination result.
CONSTITUTION: An operation data is stored in the registers 1, 2 through the lines 51, 52, and this data is provided to the operator 3 when the first clock has been supplied from the clock distribution circuit 5. An operation result of the operator is stored in the register 4 when the second clock has been supplied from the circuit 5. The effective number of digits of a data which is given to the lines 51, 52 is decided by the decision circuit 6, the first and second clock cycles are controlled by a deci- sion signal of the circuit 6, and the circuit 5 is operated so that they can be provided to the registers 1W3. The operation time can be shortened by making a clock cycle short when a data whose effective number of digits is large, and on the other hand, by making the clock cycle long when the effective number of digits is small.
COPYRIGHT: (C)1981,JPO&Japio
JP12761679A 1979-10-02 1979-10-02 Arithmetic unit Pending JPS5652440A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12761679A JPS5652440A (en) 1979-10-02 1979-10-02 Arithmetic unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12761679A JPS5652440A (en) 1979-10-02 1979-10-02 Arithmetic unit

Publications (1)

Publication Number Publication Date
JPS5652440A true JPS5652440A (en) 1981-05-11

Family

ID=14964486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12761679A Pending JPS5652440A (en) 1979-10-02 1979-10-02 Arithmetic unit

Country Status (1)

Country Link
JP (1) JPS5652440A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60168243A (en) * 1983-09-29 1985-08-31 タンデム コンピユ−タ−ズ インコ−ポレ−テツド Tester

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60168243A (en) * 1983-09-29 1985-08-31 タンデム コンピユ−タ−ズ インコ−ポレ−テツド Tester

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