JPS5637632A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5637632A
JPS5637632A JP11371079A JP11371079A JPS5637632A JP S5637632 A JPS5637632 A JP S5637632A JP 11371079 A JP11371079 A JP 11371079A JP 11371079 A JP11371079 A JP 11371079A JP S5637632 A JPS5637632 A JP S5637632A
Authority
JP
Japan
Prior art keywords
adhesiveness
wiring
insulating film
mask
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11371079A
Other languages
Japanese (ja)
Other versions
JPS6125219B2 (en
Inventor
Moritaka Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11371079A priority Critical patent/JPS5637632A/en
Publication of JPS5637632A publication Critical patent/JPS5637632A/en
Publication of JPS6125219B2 publication Critical patent/JPS6125219B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the occurrence of the difference in level by wiring and to try the improvement of heat resistance and adhesiveness by placing a separate high molecular resin layer over a isocyanuric acid ester polymer film wherein an insulating film between layers is formed. CONSTITUTION:Triaryl isocyanate with good heat resistance and adhesiveness is applied on Al wiring and an insulating film is made by polymerization hardening. Next, a polyimide resin film is placed on the insulating film and polymerization hardening is done by heating and the unevenness caused by perforated holes of a electrode leader section or the like is flatted. With spatter etching consecutively done by using a Cr mask, a window will be opened at a predetermined part on the Al wiring. Al wiring on the upper layer is formed by eliminating the Cr mask. Adhesiveness of the insulating film between layers by this composition will endure all kinds of heat treatment during a process and the adhesiveness is practically sufficient and the deterioration in insulation will not exist.
JP11371079A 1979-09-05 1979-09-05 Semiconductor device Granted JPS5637632A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11371079A JPS5637632A (en) 1979-09-05 1979-09-05 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11371079A JPS5637632A (en) 1979-09-05 1979-09-05 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5637632A true JPS5637632A (en) 1981-04-11
JPS6125219B2 JPS6125219B2 (en) 1986-06-14

Family

ID=14619188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11371079A Granted JPS5637632A (en) 1979-09-05 1979-09-05 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5637632A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5591676A (en) * 1991-10-21 1997-01-07 Motorola, Inc. Method of making a semiconductor device having a low permittivity dielectric

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6389827U (en) * 1986-12-01 1988-06-10

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5591676A (en) * 1991-10-21 1997-01-07 Motorola, Inc. Method of making a semiconductor device having a low permittivity dielectric

Also Published As

Publication number Publication date
JPS6125219B2 (en) 1986-06-14

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