JPS5633871A - Clock driver circuit - Google Patents

Clock driver circuit

Info

Publication number
JPS5633871A
JPS5633871A JP11008379A JP11008379A JPS5633871A JP S5633871 A JPS5633871 A JP S5633871A JP 11008379 A JP11008379 A JP 11008379A JP 11008379 A JP11008379 A JP 11008379A JP S5633871 A JPS5633871 A JP S5633871A
Authority
JP
Japan
Prior art keywords
capacity
mosc
injected
contact
mos structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11008379A
Other languages
Japanese (ja)
Inventor
Yoichi Hida
Kazuhiro Shimotori
Toshio Ichiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11008379A priority Critical patent/JPS5633871A/en
Publication of JPS5633871A publication Critical patent/JPS5633871A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/01855—Interface arrangements synchronous, i.e. using clock signals

Abstract

PURPOSE:To prevent electric charges from being injected into a substrate through the capacity in a MOS structure and P-n junction formed between a drain region and the subtrate by a method wherein the connecting direction in which the capacity in the MOS structure used as a boosting capacity is properly arranged. CONSTITUTION:The capacity (MOSC) 9a in the MOS structure is connected on the gate side to a contact 12, and one source and drain structure sides to a contact 7. When a clock pulse inversion phi rises, the electric potential at the cotact 12 is translated in a moment by MOSC 9a from the earth potential E to a load. However, the source and the drain regions 23, 24 of MOSC 9a are connected to the contact 7 at which potential never becomes negative, so that electrons are injected into the P type semiconductor substrate 22 through a diode 14 only, whose dimension is comparatively small and accordingly a small amount of electrons are injected into the substrate 22.
JP11008379A 1979-08-28 1979-08-28 Clock driver circuit Pending JPS5633871A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11008379A JPS5633871A (en) 1979-08-28 1979-08-28 Clock driver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11008379A JPS5633871A (en) 1979-08-28 1979-08-28 Clock driver circuit

Publications (1)

Publication Number Publication Date
JPS5633871A true JPS5633871A (en) 1981-04-04

Family

ID=14526591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11008379A Pending JPS5633871A (en) 1979-08-28 1979-08-28 Clock driver circuit

Country Status (1)

Country Link
JP (1) JPS5633871A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180066031A (en) 2015-09-03 2018-06-18 가부시끼가이샤 도시바 Voltage variation suppression apparatus and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180066031A (en) 2015-09-03 2018-06-18 가부시끼가이샤 도시바 Voltage variation suppression apparatus and method

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