JPS5631129A - Circuit adaptor device - Google Patents

Circuit adaptor device

Info

Publication number
JPS5631129A
JPS5631129A JP10644579A JP10644579A JPS5631129A JP S5631129 A JPS5631129 A JP S5631129A JP 10644579 A JP10644579 A JP 10644579A JP 10644579 A JP10644579 A JP 10644579A JP S5631129 A JPS5631129 A JP S5631129A
Authority
JP
Japan
Prior art keywords
terminal
control table
state
transmitted
electronic computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10644579A
Other languages
Japanese (ja)
Other versions
JPS6042981B2 (en
Inventor
Kiyoshi Oi
Hiroshi Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54106445A priority Critical patent/JPS6042981B2/en
Publication of JPS5631129A publication Critical patent/JPS5631129A/en
Publication of JPS6042981B2 publication Critical patent/JPS6042981B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To ensure an automatic transmission of the information showing the state of the electronic computer to the terminal, by reading the contents of the control table within the main memory when the specific signal is transmitted from the terminal and then sending this read data back to the terminal for transmission of the specific signal.
CONSTITUTION: When the break signal is transmitted from the terminal, the break detecting circuit 14 of the circuit adaptor device 3 detects the break signal and then actuates the timer 13 to carry out the reading of the necessary area within the control table of the memory 2. The information showing the state of the electronic computer is written into the control table, and the contents read out are coded through the coding circuit 10 to be sent to the terminal through which the break signal has been transmitted and via the transmission register 11 and the MODEM. At the terminal, the control table information sent is displayed on the display unit. Thus the state of the electronic computer can be known, and accordingly the progress state of the requested job can be grasped.
COPYRIGHT: (C)1981,JPO&Japio
JP54106445A 1979-08-21 1979-08-21 line adapter device Expired JPS6042981B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54106445A JPS6042981B2 (en) 1979-08-21 1979-08-21 line adapter device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54106445A JPS6042981B2 (en) 1979-08-21 1979-08-21 line adapter device

Publications (2)

Publication Number Publication Date
JPS5631129A true JPS5631129A (en) 1981-03-28
JPS6042981B2 JPS6042981B2 (en) 1985-09-26

Family

ID=14433811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54106445A Expired JPS6042981B2 (en) 1979-08-21 1979-08-21 line adapter device

Country Status (1)

Country Link
JP (1) JPS6042981B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856168A (en) * 1981-09-30 1983-04-02 Fujitsu Ltd Data processing system with end user terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856168A (en) * 1981-09-30 1983-04-02 Fujitsu Ltd Data processing system with end user terminal

Also Published As

Publication number Publication date
JPS6042981B2 (en) 1985-09-26

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