JPS5688549A - Multiplex system for external memory device in electronic computer system - Google Patents

Multiplex system for external memory device in electronic computer system

Info

Publication number
JPS5688549A
JPS5688549A JP16636079A JP16636079A JPS5688549A JP S5688549 A JPS5688549 A JP S5688549A JP 16636079 A JP16636079 A JP 16636079A JP 16636079 A JP16636079 A JP 16636079A JP S5688549 A JPS5688549 A JP S5688549A
Authority
JP
Japan
Prior art keywords
external memory
memory device
electronic computer
computer system
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16636079A
Other languages
Japanese (ja)
Inventor
Akihiko Wakamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16636079A priority Critical patent/JPS5688549A/en
Publication of JPS5688549A publication Critical patent/JPS5688549A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable continuous operation without stopping an electronic computer system by transferring information in the electronic computer system fo one external memory device while storing the information in the other external memory device.
CONSTITUTION: External memory devices 31 and 32 are provided in parallel to CPU1 and handled equally and information from signal line 41 is processed as to both devices 31 and 32. Writing information of the same contents in both devices 31 and 32 equally makes it possible to continue the operation of the electronic computer system even if one external memory device stopps due to a fault.
COPYRIGHT: (C)1981,JPO&Japio
JP16636079A 1979-12-21 1979-12-21 Multiplex system for external memory device in electronic computer system Pending JPS5688549A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16636079A JPS5688549A (en) 1979-12-21 1979-12-21 Multiplex system for external memory device in electronic computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16636079A JPS5688549A (en) 1979-12-21 1979-12-21 Multiplex system for external memory device in electronic computer system

Publications (1)

Publication Number Publication Date
JPS5688549A true JPS5688549A (en) 1981-07-18

Family

ID=15829937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16636079A Pending JPS5688549A (en) 1979-12-21 1979-12-21 Multiplex system for external memory device in electronic computer system

Country Status (1)

Country Link
JP (1) JPS5688549A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5134619A (en) * 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
US5140592A (en) * 1990-03-02 1992-08-18 Sf2 Corporation Disk array system
US5146574A (en) * 1989-06-27 1992-09-08 Sf2 Corporation Method and circuit for programmable selecting a variable sequence of element using write-back
US5202856A (en) * 1990-04-05 1993-04-13 Micro Technology, Inc. Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5212785A (en) * 1990-04-06 1993-05-18 Micro Technology, Inc. Apparatus and method for controlling data flow between a computer and memory devices
US5214778A (en) * 1990-04-06 1993-05-25 Micro Technology, Inc. Resource management in a multiple resource system
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5461723A (en) * 1990-04-05 1995-10-24 Mit Technology Corp. Dual channel data block transfer bus
US5469453A (en) * 1990-03-02 1995-11-21 Mti Technology Corporation Data corrections applicable to redundant arrays of independent disks

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146574A (en) * 1989-06-27 1992-09-08 Sf2 Corporation Method and circuit for programmable selecting a variable sequence of element using write-back
US5349686A (en) * 1989-06-27 1994-09-20 Mti Technology Corporation Method and circuit for programmably selecting a variable sequence of elements using write-back
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5140592A (en) * 1990-03-02 1992-08-18 Sf2 Corporation Disk array system
US5469453A (en) * 1990-03-02 1995-11-21 Mti Technology Corporation Data corrections applicable to redundant arrays of independent disks
US5202856A (en) * 1990-04-05 1993-04-13 Micro Technology, Inc. Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5461723A (en) * 1990-04-05 1995-10-24 Mit Technology Corp. Dual channel data block transfer bus
US5134619A (en) * 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
US5212785A (en) * 1990-04-06 1993-05-18 Micro Technology, Inc. Apparatus and method for controlling data flow between a computer and memory devices
US5214778A (en) * 1990-04-06 1993-05-25 Micro Technology, Inc. Resource management in a multiple resource system
US5361347A (en) * 1990-04-06 1994-11-01 Mti Technology Corporation Resource management in a multiple resource system where each resource includes an availability state stored in a memory of the resource
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol

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