JPS5692619A - Coupling method of electronic computer and direct memory access device - Google Patents
Coupling method of electronic computer and direct memory access deviceInfo
- Publication number
- JPS5692619A JPS5692619A JP16921079A JP16921079A JPS5692619A JP S5692619 A JPS5692619 A JP S5692619A JP 16921079 A JP16921079 A JP 16921079A JP 16921079 A JP16921079 A JP 16921079A JP S5692619 A JPS5692619 A JP S5692619A
- Authority
- JP
- Japan
- Prior art keywords
- memory access
- direct memory
- electronic computer
- information
- access device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Multi Processors (AREA)
- Hardware Redundancy (AREA)
Abstract
PURPOSE: To enable to save valuable main memory of an electronic computer, by monitoring the specific information only fed from the direct memory access device in a waiting system to the electronic computer.
CONSTITUTION: The information from information transmitters 3a,...3n is transferred in parallel with two systems of direct memory access devices 2a, 2b, the information of which is transferred to two systems of computers 1a, 1b in parallel. Further, the direct memory access device 2a, 2b and the computers 1a, 1b are in normal stand-by running state with a switching instruction 6 from a switching device 5. With the constitution like this, the necessity of the duplex main memory of information from the direct memory access devices 2a, 2b per the computers 1a, 1b is avoided to enable to save valuable main memory.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54169210A JPS604498B2 (en) | 1979-12-27 | 1979-12-27 | How to combine an electronic computer and a direct memory access device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54169210A JPS604498B2 (en) | 1979-12-27 | 1979-12-27 | How to combine an electronic computer and a direct memory access device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5692619A true JPS5692619A (en) | 1981-07-27 |
JPS604498B2 JPS604498B2 (en) | 1985-02-04 |
Family
ID=15882236
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54169210A Expired JPS604498B2 (en) | 1979-12-27 | 1979-12-27 | How to combine an electronic computer and a direct memory access device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS604498B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60251443A (en) * | 1984-05-28 | 1985-12-12 | Toshiba Corp | Backup device of programmable controller |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0513995U (en) * | 1991-06-21 | 1993-02-23 | 石川島播磨重工業株式会社 | Inner pasting structure of concrete container |
-
1979
- 1979-12-27 JP JP54169210A patent/JPS604498B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60251443A (en) * | 1984-05-28 | 1985-12-12 | Toshiba Corp | Backup device of programmable controller |
Also Published As
Publication number | Publication date |
---|---|
JPS604498B2 (en) | 1985-02-04 |
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