JPS5630756A - Semiconductor device - Google Patents

Abstract

PURPOSE:To contrive the improvement in the withstand voltage of a semiconductor device by forming a P type layer at the end of a collector and base junction in a PNP mesa type transistor. CONSTITUTION:An N type layer 33 is selectively formed on an N type substrate 31, a P type base layer 34 is superimposed thereon, and an N type emitter 35 is formed thereon. An opening is perforated at the film 32, is mesa etched, and an insulating film 39 is coated on the surface of the mesa groove. Finally, an emitter electrode 36, a base electrode 37 and collector electrode 38 are formed thereon, and are isolated through the mesa grooves. When the collector and the base are reversely biased therebetween in this configuration, a space charge layer 40 of the layer 31 is internally expanded in the layer 31 due to the P type layer 33 and the space charge layer 41 of the layer 34 is internally expanded. Accordingly, the electric field intensity of the junction end can be remarkably weakened to cause the destruction in the internal junction. Resultantly, its withstand voltage can be remarkably improved. Further, the size of the element can not be increased, and the junction can hardly be destructed.