JPS562650A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS562650A JPS562650A JP7769879A JP7769879A JPS562650A JP S562650 A JPS562650 A JP S562650A JP 7769879 A JP7769879 A JP 7769879A JP 7769879 A JP7769879 A JP 7769879A JP S562650 A JPS562650 A JP S562650A
- Authority
- JP
- Japan
- Prior art keywords
- ion
- emitter
- film
- diffusion
- covered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To obtain bipolar semiconductor IC's having good yield by a method wherein the progress of manufacturing work by the ion implantation is simplified and the abnormal diffusion is prevented. CONSTITUTION:An n-epitaxial layer 3 is put upon a P-type Si substrate 1 having an n<+>-buried layer 2 and is covered with an Si3N4 film 4, and an SiO2 films 5 are formed making openings selectively. In succession, B ion and P ion are implanted 8, 9 selectively through the film 4, and is annealed to form isolation layers 10 and collector connecting layers 11. Then the Si3N4 film 4 is removed and is covered with an SiO2 thin film 12, and the ordinary diffusion of base and emitter are performed by the ion implantation. By this way, the short-circuiting phenomenon between the emitter and the collector due to the abnormally accelerated diffusion of impurity into the defect of crystal caused by the dislocation in the emitter region, etc., is sharply reduced finally, and bipolar IC's can be produced with high yield.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7769879A JPS562650A (en) | 1979-06-20 | 1979-06-20 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7769879A JPS562650A (en) | 1979-06-20 | 1979-06-20 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS562650A true JPS562650A (en) | 1981-01-12 |
Family
ID=13641106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7769879A Pending JPS562650A (en) | 1979-06-20 | 1979-06-20 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS562650A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5856434A (en) * | 1981-09-30 | 1983-04-04 | Fujitsu Ltd | Manufacture of semiconductor device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS542682A (en) * | 1977-06-08 | 1979-01-10 | Mitsubishi Electric Corp | Manufacture of mos-type integrated circuit |
-
1979
- 1979-06-20 JP JP7769879A patent/JPS562650A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS542682A (en) * | 1977-06-08 | 1979-01-10 | Mitsubishi Electric Corp | Manufacture of mos-type integrated circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5856434A (en) * | 1981-09-30 | 1983-04-04 | Fujitsu Ltd | Manufacture of semiconductor device |
JPS6252950B2 (en) * | 1981-09-30 | 1987-11-07 | Fujitsu Ltd |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050119 |
|
A131 | Notification of reasons for refusal |
Effective date: 20080930 Free format text: JAPANESE INTERMEDIATE CODE: A131 |
|
A313 | Final decision of rejection without a dissenting response from the applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A313 Effective date: 20090210 |
|
A02 | Decision of refusal |
Effective date: 20090414 Free format text: JAPANESE INTERMEDIATE CODE: A02 |