JPS5623753A - Mos filed effect integrated circuit - Google Patents

Mos filed effect integrated circuit

Info

Publication number
JPS5623753A
JPS5623753A JP9899579A JP9899579A JPS5623753A JP S5623753 A JPS5623753 A JP S5623753A JP 9899579 A JP9899579 A JP 9899579A JP 9899579 A JP9899579 A JP 9899579A JP S5623753 A JPS5623753 A JP S5623753A
Authority
JP
Japan
Prior art keywords
film
sio2
mask
oxide film
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9899579A
Other languages
Japanese (ja)
Inventor
Toshihiko Mano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP9899579A priority Critical patent/JPS5623753A/en
Publication of JPS5623753A publication Critical patent/JPS5623753A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain high integration of an MOS field effect integrated circuit by connecting the first layer gate electrode to the second or other wires on a channel without a risk of displacement of mask. CONSTITUTION:A field oxide film 10 is formed on a P-type Si substrate 9, and openings are perforated at a gate oxide film 11. N-type impurity added polysilicon film 12 and SiO2 film 16 are superimposed thereon, Si3N4 mask 17 is coated thereon, N-type impurity is implanted thereto, and is heat treated to form N-type layers 14, 15. Then, the films 16, 17 are etched to form SiO2 18, and SiO2 19 is coated thereon, an opening is perforated selectively thereat, and an electrode 20 of aluminum is formed thereon. Since selective oxide film 18 is existed at each of both sides of the gate electrode 13 in this configuration, there exists no risk to displace the mask to shortcircuit the diffused layers 14, 15 through the electrode 20. Accordingly, the gate electrode can be connected to the wiring metal on the channel so as to reduce the occupying area. When the thickness of the film 18 is controlled, the surface can be flattened.
JP9899579A 1979-08-02 1979-08-02 Mos filed effect integrated circuit Pending JPS5623753A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9899579A JPS5623753A (en) 1979-08-02 1979-08-02 Mos filed effect integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9899579A JPS5623753A (en) 1979-08-02 1979-08-02 Mos filed effect integrated circuit

Publications (1)

Publication Number Publication Date
JPS5623753A true JPS5623753A (en) 1981-03-06

Family

ID=14234553

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9899579A Pending JPS5623753A (en) 1979-08-02 1979-08-02 Mos filed effect integrated circuit

Country Status (1)

Country Link
JP (1) JPS5623753A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60194463U (en) * 1984-06-04 1985-12-25 黒肥地　信一 portable projection sweeper

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60194463U (en) * 1984-06-04 1985-12-25 黒肥地　信一 portable projection sweeper
JPS6337170Y2 (en) * 1984-06-04 1988-10-03

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