JPS5621331A - Manufcture of semiconductor device - Google Patents

Manufcture of semiconductor device

Info

Publication number
JPS5621331A
JPS5621331A JP9765379A JP9765379A JPS5621331A JP S5621331 A JPS5621331 A JP S5621331A JP 9765379 A JP9765379 A JP 9765379A JP 9765379 A JP9765379 A JP 9765379A JP S5621331 A JPS5621331 A JP S5621331A
Authority
JP
Japan
Prior art keywords
film
etching
exposed portion
phosphorus
coated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9765379A
Other languages
Japanese (ja)
Inventor
Yasuo Arima
Kazuya Nagase
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9765379A priority Critical patent/JPS5621331A/en
Publication of JPS5621331A publication Critical patent/JPS5621331A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To enable the patterning of very high accuracy without side etching, by adding ion injection to lithography. CONSTITUTION:A phosphosilicate glass film 2 is coated on the surface of an Si substrate 1. A photoresist film 3 is coated on the film 2. Exposure and development are effected through a required mask to provide an opening 4 in the film 3 by patterning. The film 3 is used as a mask to inject phosphorus ions through the surface into the portion of the film 2 exposed in the opening 4. As a result, a larger amount of phosphorus is injected into the exposed portion of the film 2 than its other portion coated with the film 3 and the adhesive power of the film 3 to the other 2 is greatly heightened. Etching is then performed. Since the films 2, 3 are tightly fitted on each other, no etching solution invades in between the films. Since the exposed portion of the film 2 contains more phosphorus than its other portion, the etching speed of the exposed portion is so high that the etching of the exposed portion is completed before sides of low phosphorus content are etched.
JP9765379A 1979-07-31 1979-07-31 Manufcture of semiconductor device Pending JPS5621331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9765379A JPS5621331A (en) 1979-07-31 1979-07-31 Manufcture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9765379A JPS5621331A (en) 1979-07-31 1979-07-31 Manufcture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5621331A true JPS5621331A (en) 1981-02-27

Family

ID=14198037

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9765379A Pending JPS5621331A (en) 1979-07-31 1979-07-31 Manufcture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5621331A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4723813A (en) * 1985-08-14 1988-02-09 Aprica Kassai Kabushikikaisha Table attaching construction for nursing chairs
US4999083A (en) * 1988-10-02 1991-03-12 Canon Kabushiki Kaisha Method of etching crystalline material with etchant injection inlet

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4723813A (en) * 1985-08-14 1988-02-09 Aprica Kassai Kabushikikaisha Table attaching construction for nursing chairs
US4999083A (en) * 1988-10-02 1991-03-12 Canon Kabushiki Kaisha Method of etching crystalline material with etchant injection inlet

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