JPS5618451A - Manufacture of substrate for semiconductor device - Google Patents

Manufacture of substrate for semiconductor device

Info

Publication number
JPS5618451A
JPS5618451A JP9391979A JP9391979A JPS5618451A JP S5618451 A JPS5618451 A JP S5618451A JP 9391979 A JP9391979 A JP 9391979A JP 9391979 A JP9391979 A JP 9391979A JP S5618451 A JPS5618451 A JP S5618451A
Authority
JP
Japan
Prior art keywords
film
substrate
hole
semiconductor device
lead wires
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9391979A
Other languages
Japanese (ja)
Other versions
JPS5924542B2 (en
Inventor
Miyoshi Yoshida
Koichi Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9391979A priority Critical patent/JPS5924542B2/en
Publication of JPS5618451A publication Critical patent/JPS5618451A/en
Publication of JPS5924542B2 publication Critical patent/JPS5924542B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To reduce the cost of a semiconductor device substrate and to facilitate an easy alteration of its pattern by forming sprocket holes and a hole for containing a semiconductor element using a flexible insulating film, forming lead wires and an insulating foil, and working a pattern. CONSTITUTION:Sprocket holes 12 are perforated at a flexible insulating film 11, and a hole 13 is also perforated at the portion for disposing a semiconductor element and lead wires. Then, a Cu lead wire 14 is formed on the film 11, and an insulating foil 15 formed with a hole 16 at the center is then formed from the back surface of the film 11 onto the lead wire 14. Subsequently, lead wires 17a, 17b are so formed as to bridge between the film 1 and the foil 15 at the film 14 to thus complete the production of the substrate.
JP9391979A 1979-07-23 1979-07-23 Method for manufacturing substrates for semiconductor devices Expired JPS5924542B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9391979A JPS5924542B2 (en) 1979-07-23 1979-07-23 Method for manufacturing substrates for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9391979A JPS5924542B2 (en) 1979-07-23 1979-07-23 Method for manufacturing substrates for semiconductor devices

Publications (2)

Publication Number Publication Date
JPS5618451A true JPS5618451A (en) 1981-02-21
JPS5924542B2 JPS5924542B2 (en) 1984-06-09

Family

ID=14095862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9391979A Expired JPS5924542B2 (en) 1979-07-23 1979-07-23 Method for manufacturing substrates for semiconductor devices

Country Status (1)

Country Link
JP (1) JPS5924542B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0147807A2 (en) * 1983-12-27 1985-07-10 Rogers Corporation Method for forming a substrate for tape automated bonding for electronic circuit elements
US4981817A (en) * 1988-12-29 1991-01-01 International Business Machines Corporation Tab method for implementing dynamic chip burn-in
US8847839B2 (en) 2008-12-19 2014-09-30 Hitachi Metals, Ltd. Resonance-type, receiving antenna and receiving apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0532208Y2 (en) * 1989-02-23 1993-08-18

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0147807A2 (en) * 1983-12-27 1985-07-10 Rogers Corporation Method for forming a substrate for tape automated bonding for electronic circuit elements
US4981817A (en) * 1988-12-29 1991-01-01 International Business Machines Corporation Tab method for implementing dynamic chip burn-in
US8847839B2 (en) 2008-12-19 2014-09-30 Hitachi Metals, Ltd. Resonance-type, receiving antenna and receiving apparatus

Also Published As

Publication number Publication date
JPS5924542B2 (en) 1984-06-09

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