JPS5618426A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5618426A JPS5618426A JP9328579A JP9328579A JPS5618426A JP S5618426 A JPS5618426 A JP S5618426A JP 9328579 A JP9328579 A JP 9328579A JP 9328579 A JP9328579 A JP 9328579A JP S5618426 A JPS5618426 A JP S5618426A
- Authority
- JP
- Japan
- Prior art keywords
- groove
- layer
- gas
- silicon
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
- H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Abstract
PURPOSE:To keep the flatness, by providing a coating layer flatly on polycrystalline silicon which is filled in an isolating V groove; and performing plasma etching with a gas, wherein mixing ratio of gas of fluorine series and oxygen gas is adjusted and etching speeds are equal. CONSTITUTION:The V groove is formed in an epitaxial layer 2 provided on a silicon substrate 1 by using an SiO2 layer 3 and an Si3N4 layer 4. An SiO2 layer 3' is formed on the walls of the groove, and the polycrsystalline silicon 5 is filled in the groove. A resinous coating material layer 6 comprising polyimide resin and the like is provided on said silicon 5, and the surface of the layer 6 is made approximately flat. Plasma ethching is performed by a gas, wherein the mixing ratio of C2 F6 gas and O2 is adjusted and the etching speeds of the layers 5 and 6 become equal; thereby the polycrystalline silicon outside the groove is removed. In this method, the surface of the V groove is flattened by dry etching, and the intrusion of alkali metals and the like can be prevented.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9328579A JPS5618426A (en) | 1979-07-24 | 1979-07-24 | Manufacture of semiconductor device |
DE8080302457T DE3072040D1 (en) | 1979-07-23 | 1980-07-21 | Method of manufacturing a semiconductor device wherein first and second layers are formed |
IE150580A IE52971B1 (en) | 1979-07-23 | 1980-07-21 | Method of manufacturing a semiconductor device wherein first and second layers are formed |
EP80302457A EP0023146B1 (en) | 1979-07-23 | 1980-07-21 | Method of manufacturing a semiconductor device wherein first and second layers are formed |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9328579A JPS5618426A (en) | 1979-07-24 | 1979-07-24 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5618426A true JPS5618426A (en) | 1981-02-21 |
Family
ID=14078135
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9328579A Pending JPS5618426A (en) | 1979-07-23 | 1979-07-24 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5618426A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58138834A (en) * | 1982-02-10 | 1983-08-17 | Nippon Sagiyousen Kyokai | Walking type dredger |
JPS58164877U (en) * | 1982-04-30 | 1983-11-02 | 三菱重工業株式会社 | traveling device |
JPS59179463A (en) * | 1983-03-30 | 1984-10-12 | Agency Of Ind Science & Technol | Four-leg walking machine |
US4596071A (en) * | 1983-09-05 | 1986-06-24 | Oki Electric Industry Co., Ltd. | Method of making semiconductor devices having dielectric isolation regions |
JPS624581A (en) * | 1985-06-29 | 1987-01-10 | 工業技術院長 | Mobile type manipulator |
JPS62143429A (en) * | 1985-12-17 | 1987-06-26 | Fujitsu Ltd | Manufacture of semiconductor device |
US8011487B2 (en) | 2006-04-18 | 2011-09-06 | Kabushiki Kaisha F.C.C. | Clutch outer member for multi-plate clutch |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50107877A (en) * | 1974-01-30 | 1975-08-25 | ||
JPS52131471A (en) * | 1976-04-28 | 1977-11-04 | Hitachi Ltd | Surface treatment of substrate |
-
1979
- 1979-07-24 JP JP9328579A patent/JPS5618426A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50107877A (en) * | 1974-01-30 | 1975-08-25 | ||
JPS52131471A (en) * | 1976-04-28 | 1977-11-04 | Hitachi Ltd | Surface treatment of substrate |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58138834A (en) * | 1982-02-10 | 1983-08-17 | Nippon Sagiyousen Kyokai | Walking type dredger |
JPS58164877U (en) * | 1982-04-30 | 1983-11-02 | 三菱重工業株式会社 | traveling device |
JPS59179463A (en) * | 1983-03-30 | 1984-10-12 | Agency Of Ind Science & Technol | Four-leg walking machine |
JPH0234753B2 (en) * | 1983-03-30 | 1990-08-06 | Kogyo Gijutsuin | |
US4596071A (en) * | 1983-09-05 | 1986-06-24 | Oki Electric Industry Co., Ltd. | Method of making semiconductor devices having dielectric isolation regions |
JPS624581A (en) * | 1985-06-29 | 1987-01-10 | 工業技術院長 | Mobile type manipulator |
JPH0567393B2 (en) * | 1985-06-29 | 1993-09-24 | Kogyo Gijutsuin | |
JPS62143429A (en) * | 1985-12-17 | 1987-06-26 | Fujitsu Ltd | Manufacture of semiconductor device |
US8011487B2 (en) | 2006-04-18 | 2011-09-06 | Kabushiki Kaisha F.C.C. | Clutch outer member for multi-plate clutch |
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