JPS56169319A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56169319A
JPS56169319A JP7326780A JP7326780A JPS56169319A JP S56169319 A JPS56169319 A JP S56169319A JP 7326780 A JP7326780 A JP 7326780A JP 7326780 A JP7326780 A JP 7326780A JP S56169319 A JPS56169319 A JP S56169319A
Authority
JP
Japan
Prior art keywords
substrate
regions
type
layer
epitaxial layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7326780A
Other languages
Japanese (ja)
Inventor
Kazuaki Suzuki
Masao Kachi
Yoichi Ushiyama
Goro Ikegami
Mikio Kitamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP7326780A priority Critical patent/JPS56169319A/en
Publication of JPS56169319A publication Critical patent/JPS56169319A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium

Abstract

PURPOSE:To avoid the generation of a damage on the surface electrodes of the semiconductor device when an epitaxial layer is to be made to grow on a substrate to provide element regions therein, and the electrodes are to be formed on the element regions and on the back back face of the substrate by a method wherein after the substrate is abraded up to obtain the prescribed thickness, the element regions are provided in the epitaxial layer. CONSTITUTION:The N<-> type epitaxial layer 2 is made to grow on the N<+> type substrate 1 to make it as the substrate 11, and ordinarily the element regions are to be formed in the epitaxial layer 2 at first, but the next process is performed prior to the formation thereof. Namely the back face of the substrate 1 is abraded up to obtain the prescribed thickness, and after then isulating films 7, 14 are adhered respectively to both side faces of the substrate 11. The prescribed openings are formed in the film 7, P type base regions 3 are formed by diffusion in the layer 2 to make P-N junctions 4 to be generated between the layer 2, and N type emitter regions 5 are provided therein to form P-N junction 6. After then base electrodes 8 are adhered to the regions 5, emitter electrodes 9 to the regions 5 respectively, and a collector electrode 15 is adhered to the whole back face of the substrate 1 interposing the N<++> type layer 14 between them.
JP7326780A 1980-05-30 1980-05-30 Manufacture of semiconductor device Pending JPS56169319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7326780A JPS56169319A (en) 1980-05-30 1980-05-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7326780A JPS56169319A (en) 1980-05-30 1980-05-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56169319A true JPS56169319A (en) 1981-12-26

Family

ID=13513217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7326780A Pending JPS56169319A (en) 1980-05-30 1980-05-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56169319A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54155770A (en) * 1978-05-29 1979-12-08 Nec Corp Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54155770A (en) * 1978-05-29 1979-12-08 Nec Corp Manufacture of semiconductor device

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