JPS5536919A - Manufacturing of semiconductor device - Google Patents

Manufacturing of semiconductor device

Info

Publication number
JPS5536919A
JPS5536919A JP10830478A JP10830478A JPS5536919A JP S5536919 A JPS5536919 A JP S5536919A JP 10830478 A JP10830478 A JP 10830478A JP 10830478 A JP10830478 A JP 10830478A JP S5536919 A JPS5536919 A JP S5536919A
Authority
JP
Japan
Prior art keywords
window
film
area
type
diffused
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10830478A
Other languages
Japanese (ja)
Inventor
Hiroshi Saikai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10830478A priority Critical patent/JPS5536919A/en
Publication of JPS5536919A publication Critical patent/JPS5536919A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H01L21/8226—Bipolar technology comprising merged transistor logic or integrated injection logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To manufacture IIL of low consumption power by holding an impurity density of horizontal transistor high without being subject to a restriction of the impurity density in a base area of vertical transistor and making a carrier injection of the horizontal transistor easy to improve injection efficiency. CONSTITUTION:The surface of n-type semiconductor layer 2 is covered with a silicon oxidized film 15 and silicone nitrified film 16, windows 17, 18 are provided in films 15, 16 on an area in which emitter 3 and collector 4 of the horizontal transistor are to be formed, and a silicone oxidized film 19 is formed on the exposed layer 2 and the residual film 16. After providing a window 20 somewhat larger than the window 18 in the film 19, boric acid is diffused through the window 18 at low temperature to form p-type area 4. And after growing the oxidized film 19 on the area 4, the first and the second n-type areas 5, 6 are formed in the area 4 according to selective diffusion process. After the film 19 in the window 17 is removed selectively, a window 21 somewhat larger than the window 17 in the film 19 is provided, boric acid is diffused in the layer 2 through the window 17, thereby forming p-type area 13 of high density emitter.
JP10830478A 1978-09-04 1978-09-04 Manufacturing of semiconductor device Pending JPS5536919A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10830478A JPS5536919A (en) 1978-09-04 1978-09-04 Manufacturing of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10830478A JPS5536919A (en) 1978-09-04 1978-09-04 Manufacturing of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5536919A true JPS5536919A (en) 1980-03-14

Family

ID=14481295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10830478A Pending JPS5536919A (en) 1978-09-04 1978-09-04 Manufacturing of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5536919A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952199A (en) * 1982-09-20 1984-03-26 Nippon Furekuto Kk Rotary heat exchanger equipped with sweeping function

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952199A (en) * 1982-09-20 1984-03-26 Nippon Furekuto Kk Rotary heat exchanger equipped with sweeping function
JPS6321116B2 (en) * 1982-09-20 1988-05-02 Nippon Furekuto Kk

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