JPS57107039A - Manufacture of semiconductor - Google Patents

Manufacture of semiconductor

Info

Publication number
JPS57107039A
JPS57107039A JP18527280A JP18527280A JPS57107039A JP S57107039 A JPS57107039 A JP S57107039A JP 18527280 A JP18527280 A JP 18527280A JP 18527280 A JP18527280 A JP 18527280A JP S57107039 A JPS57107039 A JP S57107039A
Authority
JP
Japan
Prior art keywords
slot
layer
mesa
dicer
wax
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18527280A
Other languages
Japanese (ja)
Inventor
Masahiro Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP18527280A priority Critical patent/JPS57107039A/en
Publication of JPS57107039A publication Critical patent/JPS57107039A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Abstract

PURPOSE:To obtain a device having a high withstand voltage by a method wherein when a reverse mesa type semiconductor pellet is made, initially the entire surface of an electrode layer is covered with wax, a shallow and wide slot is provided in the mesa slot formed by using a dicer having a flat cut face, again the wax is coated and a V-figure deep mesa slot is provided in the slot by using a dicer having a V-figure cut face. CONSTITUTION:A base layer 2 is provided on a collector layer 1 and an emitter region 3 for pellet use is formed in the region 2. Subsequently, this side is covered with a surface sheet 15, an electrode layer 4 is attached to an opposite face and a reverse mesa slot is provided through a dicing to form the pellets including the region 3 respectively. For reasons of this process, wax 16 is coated on the entire face of the electrode layer 4, and a shallow and wide slot 21 to invade into the layer 1 is formed by using a first dicer 20 having a flat cut face. Thereafter, again the wax 22 is coated, a mesa slot 24 reaching to the layer 2 is formed in the slot 21 by utilizing a dicer 23 having a V-figure cut face and a damage layer 25 is removed through an etching, thereafter it is separated into an individual pellet.
JP18527280A 1980-12-25 1980-12-25 Manufacture of semiconductor Pending JPS57107039A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18527280A JPS57107039A (en) 1980-12-25 1980-12-25 Manufacture of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18527280A JPS57107039A (en) 1980-12-25 1980-12-25 Manufacture of semiconductor

Publications (1)

Publication Number Publication Date
JPS57107039A true JPS57107039A (en) 1982-07-03

Family

ID=16167917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18527280A Pending JPS57107039A (en) 1980-12-25 1980-12-25 Manufacture of semiconductor

Country Status (1)

Country Link
JP (1) JPS57107039A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5434094A (en) * 1988-07-01 1995-07-18 Mitsubishi Denki Kabushiki Kaisha Method of producing a field effect transistor
US5786266A (en) * 1994-04-12 1998-07-28 Lsi Logic Corporation Multi cut wafer saw process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5434094A (en) * 1988-07-01 1995-07-18 Mitsubishi Denki Kabushiki Kaisha Method of producing a field effect transistor
US5786266A (en) * 1994-04-12 1998-07-28 Lsi Logic Corporation Multi cut wafer saw process

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