JPS56134765A - Thyristor element - Google Patents

Thyristor element

Info

Publication number
JPS56134765A
JPS56134765A JP3836380A JP3836380A JPS56134765A JP S56134765 A JPS56134765 A JP S56134765A JP 3836380 A JP3836380 A JP 3836380A JP 3836380 A JP3836380 A JP 3836380A JP S56134765 A JPS56134765 A JP S56134765A
Authority
JP
Japan
Prior art keywords
junction
gate
type
performance
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3836380A
Other languages
Japanese (ja)
Inventor
Tomonobu Yoshitake
Masataka Yanaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3836380A priority Critical patent/JPS56134765A/en
Publication of JPS56134765A publication Critical patent/JPS56134765A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration

Abstract

PURPOSE:To provide a stable performance of gate by a method wherein a side surface of P-N-P-N interconnect structure is covered by an insulation film and a groove passing longitudinally through a junction between N type emitter and P type gate and not reaching down to n type base is provided. CONSTITUTION:At a longitudinal junction between P type gate layer 3 and an implanted N type emitter layer 4 in P-N-P-N quadrant layers structure is made a groove 13 deeper than a surface junction 11 and not reaching to N type base 2 by a chemical etching process. The junction end exposed to the inner surface of the groove is covered by a glass film 14. With this arrangement, a stabilized performance of gate may be assured. Curved portion in P-N junction is removed, some cause for producing variation of performance due to concentrated electric field, SCR having no dispersion in gate performance may easily be obtained.
JP3836380A 1980-03-26 1980-03-26 Thyristor element Pending JPS56134765A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3836380A JPS56134765A (en) 1980-03-26 1980-03-26 Thyristor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3836380A JPS56134765A (en) 1980-03-26 1980-03-26 Thyristor element

Publications (1)

Publication Number Publication Date
JPS56134765A true JPS56134765A (en) 1981-10-21

Family

ID=12523192

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3836380A Pending JPS56134765A (en) 1980-03-26 1980-03-26 Thyristor element

Country Status (1)

Country Link
JP (1) JPS56134765A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010014507A1 (en) 2008-07-30 2010-02-04 Trion Technology, Inc. Discrete semiconductor device and method of forming sealed trench junction termination
US8895399B2 (en) 2008-07-30 2014-11-25 Addison R. Crockett Integrated circuit and method of forming sealed trench junction termination

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4994285A (en) * 1973-01-12 1974-09-06
JPS5417682A (en) * 1977-07-08 1979-02-09 Mitsubishi Electric Corp Semiconductor and its manufacture

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4994285A (en) * 1973-01-12 1974-09-06
JPS5417682A (en) * 1977-07-08 1979-02-09 Mitsubishi Electric Corp Semiconductor and its manufacture

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010014507A1 (en) 2008-07-30 2010-02-04 Trion Technology, Inc. Discrete semiconductor device and method of forming sealed trench junction termination
EP2308092A1 (en) * 2008-07-30 2011-04-13 Trion Technology, Inc. Discrete semiconductor device and method of forming sealed trench junction termination
EP2308092A4 (en) * 2008-07-30 2013-02-20 Addison R Crockett Discrete semiconductor device and method of forming sealed trench junction termination
US8766398B2 (en) 2008-07-30 2014-07-01 Addison R. Crockett Discrete semiconductor device and method of forming sealed trench junction termination
US8895399B2 (en) 2008-07-30 2014-11-25 Addison R. Crockett Integrated circuit and method of forming sealed trench junction termination

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