JPS56167349A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56167349A
JPS56167349A JP7029580A JP7029580A JPS56167349A JP S56167349 A JPS56167349 A JP S56167349A JP 7029580 A JP7029580 A JP 7029580A JP 7029580 A JP7029580 A JP 7029580A JP S56167349 A JPS56167349 A JP S56167349A
Authority
JP
Japan
Prior art keywords
film
accumulated
silicide
electrode
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7029580A
Other languages
Japanese (ja)
Inventor
Hidekazu Okabayashi
Kohei Higuchi
Eiji Nagasawa
Tadatoshi Nozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7029580A priority Critical patent/JPS56167349A/en
Publication of JPS56167349A publication Critical patent/JPS56167349A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To stabilize characteristic of an MOS device having electrode wirings of low resistance by a method wherein a metal silicide thin film having a high melting point is formed on a substrate or on an insulating film provided on the substrate, and a silicon oxide film is accumulated on the silicide thin film and oxidation treatment is performed. CONSTITUTION:The Mo silicide film 4, for example, accumulated on a gate film by sputtering is photoetched to form a gate electrode 4a of the MOSFET, for example. After source, drain diffusion layers 5 are formed by ion implantation, the CVD SiO2 film 6 is accumulated on the whole surface thereof. Then thermal oxidation treatment is performed to oxidize the surface of the silicide film 4a through the SiO2 film 6 to form an SiO2 film 7. Respective processes of accumulation of an interlayer film 8, formation of a contact hole, formation of an Al inside wiring 9 are performed in succession to complete the FET. Accordingly at the MOS circuit being the electrode thereof formed with the metal silicide having low resistance, inferior insulation and a leak current can be reduced, and characteristic thereof can be stabilized.
JP7029580A 1980-05-27 1980-05-27 Manufacture of semiconductor device Pending JPS56167349A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7029580A JPS56167349A (en) 1980-05-27 1980-05-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7029580A JPS56167349A (en) 1980-05-27 1980-05-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56167349A true JPS56167349A (en) 1981-12-23

Family

ID=13427322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7029580A Pending JPS56167349A (en) 1980-05-27 1980-05-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56167349A (en)

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