JPS56166567A - Failure monitor for digital device - Google Patents

Failure monitor for digital device

Info

Publication number
JPS56166567A
JPS56166567A JP7191480A JP7191480A JPS56166567A JP S56166567 A JPS56166567 A JP S56166567A JP 7191480 A JP7191480 A JP 7191480A JP 7191480 A JP7191480 A JP 7191480A JP S56166567 A JPS56166567 A JP S56166567A
Authority
JP
Japan
Prior art keywords
occurrence
error
information
failure
parity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7191480A
Other languages
Japanese (ja)
Inventor
Takehiko Tokura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7191480A priority Critical patent/JPS56166567A/en
Publication of JPS56166567A publication Critical patent/JPS56166567A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To easily search the cause for the occurrence of failure by storing the information transmitted in every occurrence of failure. CONSTITUTION:If there is any error in information transmission S1-SN, this is detected by a parity detector 13, and a parity check signal PK is generated from a pulse generator 14 in every incoming of a system clock CL, and the information having the error is written in a memory circuit 15. The information read out from the memory circuit 15 is processed for display and storage in an output processing circuit as required, for the searching the cause for the occurrence of the parity error.
JP7191480A 1980-05-27 1980-05-27 Failure monitor for digital device Pending JPS56166567A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7191480A JPS56166567A (en) 1980-05-27 1980-05-27 Failure monitor for digital device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7191480A JPS56166567A (en) 1980-05-27 1980-05-27 Failure monitor for digital device

Publications (1)

Publication Number Publication Date
JPS56166567A true JPS56166567A (en) 1981-12-21

Family

ID=13474275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7191480A Pending JPS56166567A (en) 1980-05-27 1980-05-27 Failure monitor for digital device

Country Status (1)

Country Link
JP (1) JPS56166567A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5321542A (en) * 1976-08-12 1978-02-28 Fujitsu Ltd Error data memory circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5321542A (en) * 1976-08-12 1978-02-28 Fujitsu Ltd Error data memory circuit

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