JPS57195397A - Locally doubled storage device - Google Patents

Locally doubled storage device

Info

Publication number
JPS57195397A
JPS57195397A JP56080178A JP8017881A JPS57195397A JP S57195397 A JPS57195397 A JP S57195397A JP 56080178 A JP56080178 A JP 56080178A JP 8017881 A JP8017881 A JP 8017881A JP S57195397 A JPS57195397 A JP S57195397A
Authority
JP
Japan
Prior art keywords
set
circuit
output
module
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56080178A
Other versions
JPS6235704B2 (en
Inventor
Toshiyuki Furui
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP56080178A priority Critical patent/JPS6235704B2/ja
Publication of JPS57195397A publication Critical patent/JPS57195397A/en
Publication of JPS6235704B2 publication Critical patent/JPS6235704B2/ja
Application status is Expired legal-status Critical

Links

Abstract

PURPOSE: To evade the interruption of a system by irreducible necessary local doubling by using optional one of modules in a main storage device as a backup module for doubling.
CONSTITUTION: For example, the 1st module selection register 13 is set to (01) and the 2nd module selection register 20 is set to (11). In this case, when (01) is selected by an address register 10, the output 102 of a decoder 11 goes up to (1). Once the terminal S of a storage module 42 is set to (1) through an OR circuit 27, an input to an AND gate 25 is set to (1) through an AND circuit 16 and an OR circuit 19, and then ANDed with the output 119 of a decoder 21 to hold the output 124 of the AND gate 25 at (1), so that the terminal S of a storage module 44 also goes up to (1).
COPYRIGHT: (C)1982,JPO&Japio
JP56080178A 1981-05-28 1981-05-28 Expired JPS6235704B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56080178A JPS6235704B2 (en) 1981-05-28 1981-05-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56080178A JPS6235704B2 (en) 1981-05-28 1981-05-28

Publications (2)

Publication Number Publication Date
JPS57195397A true JPS57195397A (en) 1982-12-01
JPS6235704B2 JPS6235704B2 (en) 1987-08-03

Family

ID=13711094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56080178A Expired JPS6235704B2 (en) 1981-05-28 1981-05-28

Country Status (1)

Country Link
JP (1) JPS6235704B2 (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5134619A (en) * 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
US5140592A (en) * 1990-03-02 1992-08-18 Sf2 Corporation Disk array system
US5146574A (en) * 1989-06-27 1992-09-08 Sf2 Corporation Method and circuit for programmable selecting a variable sequence of element using write-back
US5202856A (en) * 1990-04-05 1993-04-13 Micro Technology, Inc. Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5212785A (en) * 1990-04-06 1993-05-18 Micro Technology, Inc. Apparatus and method for controlling data flow between a computer and memory devices
US5214778A (en) * 1990-04-06 1993-05-25 Micro Technology, Inc. Resource management in a multiple resource system
US5233692A (en) * 1990-04-06 1993-08-03 Micro Technology, Inc. Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5325497A (en) * 1990-03-29 1994-06-28 Micro Technology, Inc. Method and apparatus for assigning signatures to identify members of a set of mass of storage devices
US5388243A (en) * 1990-03-09 1995-02-07 Mti Technology Corporation Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5461723A (en) * 1990-04-05 1995-10-24 Mit Technology Corp. Dual channel data block transfer bus
US5469453A (en) * 1990-03-02 1995-11-21 Mti Technology Corporation Data corrections applicable to redundant arrays of independent disks
US5956524A (en) * 1990-04-06 1999-09-21 Micro Technology Inc. System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
JP2009176094A (en) * 2008-01-25 2009-08-06 Fujitsu Ltd Transfer device, control method thereof, and information processing apparatus

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5349686A (en) * 1989-06-27 1994-09-20 Mti Technology Corporation Method and circuit for programmably selecting a variable sequence of elements using write-back
US5146574A (en) * 1989-06-27 1992-09-08 Sf2 Corporation Method and circuit for programmable selecting a variable sequence of element using write-back
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5469453A (en) * 1990-03-02 1995-11-21 Mti Technology Corporation Data corrections applicable to redundant arrays of independent disks
US5140592A (en) * 1990-03-02 1992-08-18 Sf2 Corporation Disk array system
US5388243A (en) * 1990-03-09 1995-02-07 Mti Technology Corporation Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
US5325497A (en) * 1990-03-29 1994-06-28 Micro Technology, Inc. Method and apparatus for assigning signatures to identify members of a set of mass of storage devices
US5202856A (en) * 1990-04-05 1993-04-13 Micro Technology, Inc. Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5461723A (en) * 1990-04-05 1995-10-24 Mit Technology Corp. Dual channel data block transfer bus
US5134619A (en) * 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
US5361347A (en) * 1990-04-06 1994-11-01 Mti Technology Corporation Resource management in a multiple resource system where each resource includes an availability state stored in a memory of the resource
US5233692A (en) * 1990-04-06 1993-08-03 Micro Technology, Inc. Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5454085A (en) * 1990-04-06 1995-09-26 Mti Technology Corporation Method and apparatus for an enhanced computer system interface
US5214778A (en) * 1990-04-06 1993-05-25 Micro Technology, Inc. Resource management in a multiple resource system
US5212785A (en) * 1990-04-06 1993-05-18 Micro Technology, Inc. Apparatus and method for controlling data flow between a computer and memory devices
US5956524A (en) * 1990-04-06 1999-09-21 Micro Technology Inc. System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
JP2009176094A (en) * 2008-01-25 2009-08-06 Fujitsu Ltd Transfer device, control method thereof, and information processing apparatus
US8327197B2 (en) 2008-01-25 2012-12-04 Fujitsu Limited Information processing apparatus including transfer device for transferring data

Also Published As

Publication number Publication date
JPS6235704B2 (en) 1987-08-03

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