JPS56158468A - Method of manufacturing itnegrated circuit - Google Patents

Method of manufacturing itnegrated circuit

Info

Publication number
JPS56158468A
JPS56158468A JP1821581A JP1821581A JPS56158468A JP S56158468 A JPS56158468 A JP S56158468A JP 1821581 A JP1821581 A JP 1821581A JP 1821581 A JP1821581 A JP 1821581A JP S56158468 A JPS56158468 A JP S56158468A
Authority
JP
Japan
Prior art keywords
itnegrated
manufacturing
circuit
manufacturing itnegrated
itnegrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1821581A
Other languages
English (en)
Japanese (ja)
Inventor
Aa Piotorousuki Riiou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harris Corp
Original Assignee
Harris Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harris Corp filed Critical Harris Corp
Publication of JPS56158468A publication Critical patent/JPS56158468A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/67—Complementary BJTs
    • H10D84/673—Vertical complementary BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/008—Bi-level fabrication
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/009—Bi-MOS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/133—Reflow oxides and glasses

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP1821581A 1980-02-25 1981-02-12 Method of manufacturing itnegrated circuit Pending JPS56158468A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/124,201 US4299024A (en) 1980-02-25 1980-02-25 Fabrication of complementary bipolar transistors and CMOS devices with poly gates

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP3228198A Division JPH05347383A (ja) 1980-02-25 1991-05-27 集積回路の製法

Publications (1)

Publication Number Publication Date
JPS56158468A true JPS56158468A (en) 1981-12-07

Family

ID=22413419

Family Applications (2)

Application Number Title Priority Date Filing Date
JP1821581A Pending JPS56158468A (en) 1980-02-25 1981-02-12 Method of manufacturing itnegrated circuit
JP3228198A Pending JPH05347383A (ja) 1980-02-25 1991-05-27 集積回路の製法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP3228198A Pending JPH05347383A (ja) 1980-02-25 1991-05-27 集積回路の製法

Country Status (5)

Country Link
US (1) US4299024A (en, 2012)
JP (2) JPS56158468A (en, 2012)
DE (1) DE3105118C2 (en, 2012)
FR (1) FR2476911A1 (en, 2012)
GB (1) GB2071910B (en, 2012)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5941864A (ja) * 1982-05-06 1984-03-08 アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド モノリシツク集積回路の製造方法
JPS59200457A (ja) * 1983-04-18 1984-11-13 アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド 集積された絶縁ゲ−ト電界効果トランジスタを有するモノリシツク集積回路の製造方法
JPS6134954A (ja) * 1984-07-25 1986-02-19 Matsushita Electric Works Ltd 半導体装置用材料の製法
JPH01169961A (ja) * 1987-12-24 1989-07-05 Sharp Corp 半導体装置
JPH01199447A (ja) * 1987-10-09 1989-08-10 American Teleph & Telegr Co <Att> 感光性記録材料の処理方法
JPH07169845A (ja) * 1993-12-15 1995-07-04 Nec Corp 半導体装置及びその製造方法

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3205022A1 (de) * 1981-02-14 1982-09-16 Mitsubishi Denki K.K., Tokyo Verfahren zum herstellen einer integrierten halbleiterschaltung
JPS58211222A (ja) * 1982-05-31 1983-12-08 Sharp Corp 定電圧回路
DE3230077A1 (de) * 1982-08-12 1984-02-16 Siemens AG, 1000 Berlin und 8000 München Integrierte bipolar- und mos-transistoren enthaltende halbleiterschaltung auf einem chip und verfahren zu ihrer herstellung
US4475955A (en) * 1982-12-06 1984-10-09 Harris Corporation Method for forming integrated circuits bearing polysilicon of reduced resistance
US4729008A (en) * 1982-12-08 1988-03-01 Harris Corporation High voltage IC bipolar transistors operable to BVCBO and method of fabrication
US5281545A (en) * 1982-12-10 1994-01-25 Ricoh Company, Ltd. Processes for manufacturing a semiconductor device
US4598462A (en) * 1983-04-07 1986-07-08 Rca Corporation Method for making semiconductor device with integral fuse
US4553318A (en) * 1983-05-02 1985-11-19 Rca Corporation Method of making integrated PNP and NPN bipolar transistors and junction field effect transistor
US4574467A (en) * 1983-08-31 1986-03-11 Solid State Scientific, Inc. N- well CMOS process on a P substrate with double field guard rings and a PMOS buried channel
US4593458A (en) * 1984-11-02 1986-06-10 General Electric Company Fabrication of integrated circuit with complementary, dielectrically-isolated, high voltage semiconductor devices
ATE59917T1 (de) * 1985-09-13 1991-01-15 Siemens Ag Integrierte bipolar- und komplementaere mostransistoren auf einem gemeinsamen substrat enthaltende schaltung und verfahren zu ihrer herstellung.
US5049519A (en) * 1985-09-16 1991-09-17 Texas Instruments Incorporated Latch-up resistant CMOS process
US4717680A (en) * 1985-10-16 1988-01-05 Harris Corporation Fabrication of vertical NPN and PNP bipolar transistors in monolithic substrate
US4665425A (en) * 1985-10-16 1987-05-12 Harris Corporation Fabrication of vertical NPN and PNP bipolar transistors in monolithic substrate
US4728624A (en) * 1985-10-31 1988-03-01 International Business Machines Corporation Selective epitaxial growth structure and isolation
US4751561A (en) * 1986-04-29 1988-06-14 Rca Corporation Dielectrically isolated PMOS, NMOS, PNP and NPN transistors on a silicon wafer
US4685199A (en) * 1986-04-29 1987-08-11 Rca Corporation Method for forming dielectrically isolated PMOS, NMOS, PNP and NPN transistors on a silicon wafer
US4808547A (en) * 1986-07-07 1989-02-28 Harris Corporation Method of fabrication of high voltage IC bopolar transistors operable to BVCBO
US4727046A (en) * 1986-07-16 1988-02-23 Fairchild Semiconductor Corporation Method of fabricating high performance BiCMOS structures having poly emitters and silicided bases
KR900001062B1 (ko) * 1987-09-15 1990-02-26 강진구 반도체 바이 씨 모오스 장치의 제조방법
JPH01282857A (ja) * 1988-05-10 1989-11-14 Seiko Epson Corp 半導体装置及びその製造方法
DE3916707A1 (de) * 1988-07-06 1990-01-11 Halbleiterwerk Frankfurt Oder Halbleiteranordnung fuer eine integrierte schaltung und verfahren fuer deren herstellung
US4982257A (en) * 1988-08-01 1991-01-01 International Business Machines Corporation Vertical bipolar transistor with collector and base extensions
US4957875A (en) * 1988-08-01 1990-09-18 International Business Machines Corporation Vertical bipolar transistor
US4910160A (en) * 1989-06-06 1990-03-20 National Semiconductor Corporation High voltage complementary NPN/PNP process
US5206182A (en) * 1989-06-08 1993-04-27 United Technologies Corporation Trench isolation process
US5079176A (en) * 1990-03-26 1992-01-07 Harris Corporation Method of forming a high voltage junction in a dielectrically isolated island
US5429959A (en) * 1990-11-23 1995-07-04 Texas Instruments Incorporated Process for simultaneously fabricating a bipolar transistor and a field-effect transistor
US5246883A (en) * 1992-02-06 1993-09-21 Sgs-Thomson Microelectronics, Inc. Semiconductor contact via structure and method
JPH07106452A (ja) * 1993-10-04 1995-04-21 Mitsubishi Electric Corp 半導体装置およびその製造方法
EP0681319B1 (en) * 1994-04-15 2002-10-30 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6004840A (en) * 1994-04-15 1999-12-21 Kabushiki Kaisha Toshiba Method of fabricating a semiconductor device comprising a MOS portion and a bipolar portion
TW512526B (en) * 2000-09-07 2002-12-01 Sanyo Electric Co Semiconductor integrated circuit device and manufacturing method thereof
US6768183B2 (en) * 2001-04-20 2004-07-27 Denso Corporation Semiconductor device having bipolar transistors
DE102007034801B4 (de) * 2007-03-26 2010-10-28 X-Fab Semiconductor Foundries Ag BiMOS-Halbleiterbauelement mit Herstellverfahren mit Bipolarintegration ohne zusätzliche Maskenschritte

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4928279A (en, 2012) * 1972-07-10 1974-03-13
JPS4965189A (en, 2012) * 1972-10-24 1974-06-24
JPS526008A (en) * 1975-07-04 1977-01-18 Hitachi Ltd Subscriber's circuit
JPS5269278A (en) * 1975-12-08 1977-06-08 Hitachi Ltd Production of s#-gate type complementary mos semiconductor device
JPS5420679A (en) * 1977-07-18 1979-02-16 Hitachi Ltd Bipolar mos semiconductor integrated circuit device and the same
JPS54156482A (en) * 1978-05-30 1979-12-10 Nec Corp Manufacture for field effect type semiconductor device

Family Cites Families (11)

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US3609479A (en) * 1968-02-29 1971-09-28 Westinghouse Electric Corp Semiconductor integrated circuit having mis and bipolar transistor elements
US3576475A (en) * 1968-08-29 1971-04-27 Texas Instruments Inc Field effect transistors for integrated circuits and methods of manufacture
GB1258382A (en, 2012) * 1969-01-16 1971-12-30
US3818583A (en) * 1970-07-08 1974-06-25 Signetics Corp Method for fabricating semiconductor structure having complementary devices
US3999213A (en) * 1972-04-14 1976-12-21 U.S. Philips Corporation Semiconductor device and method of manufacturing the device
US3865649A (en) * 1972-10-16 1975-02-11 Harris Intertype Corp Fabrication of MOS devices and complementary bipolar transistor devices in a monolithic substrate
US3892606A (en) * 1973-06-28 1975-07-01 Ibm Method for forming silicon conductive layers utilizing differential etching rates
US4075754A (en) * 1974-02-26 1978-02-28 Harris Corporation Self aligned gate for di-CMOS
US3899373A (en) * 1974-05-20 1975-08-12 Ibm Method for forming a field effect device
US4120707A (en) * 1977-03-30 1978-10-17 Harris Corporation Process of fabricating junction isolated IGFET and bipolar transistor integrated circuit by diffusion
US4191603A (en) * 1978-05-01 1980-03-04 International Business Machines Corporation Making semiconductor structure with improved phosphosilicate glass isolation

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4928279A (en, 2012) * 1972-07-10 1974-03-13
JPS4965189A (en, 2012) * 1972-10-24 1974-06-24
JPS526008A (en) * 1975-07-04 1977-01-18 Hitachi Ltd Subscriber's circuit
JPS5269278A (en) * 1975-12-08 1977-06-08 Hitachi Ltd Production of s#-gate type complementary mos semiconductor device
JPS5420679A (en) * 1977-07-18 1979-02-16 Hitachi Ltd Bipolar mos semiconductor integrated circuit device and the same
JPS54156482A (en) * 1978-05-30 1979-12-10 Nec Corp Manufacture for field effect type semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5941864A (ja) * 1982-05-06 1984-03-08 アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド モノリシツク集積回路の製造方法
JPS59200457A (ja) * 1983-04-18 1984-11-13 アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド 集積された絶縁ゲ−ト電界効果トランジスタを有するモノリシツク集積回路の製造方法
JPS6134954A (ja) * 1984-07-25 1986-02-19 Matsushita Electric Works Ltd 半導体装置用材料の製法
JPH01199447A (ja) * 1987-10-09 1989-08-10 American Teleph & Telegr Co <Att> 感光性記録材料の処理方法
JPH01169961A (ja) * 1987-12-24 1989-07-05 Sharp Corp 半導体装置
JPH07169845A (ja) * 1993-12-15 1995-07-04 Nec Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
FR2476911A1 (fr) 1981-08-28
GB2071910B (en) 1984-04-18
US4299024A (en) 1981-11-10
DE3105118A1 (de) 1981-12-24
DE3105118C2 (de) 1994-05-05
GB2071910A (en) 1981-09-23
JPH05347383A (ja) 1993-12-27
FR2476911B1 (en, 2012) 1985-03-08

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