JPS56158466A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56158466A
JPS56158466A JP6296480A JP6296480A JPS56158466A JP S56158466 A JPS56158466 A JP S56158466A JP 6296480 A JP6296480 A JP 6296480A JP 6296480 A JP6296480 A JP 6296480A JP S56158466 A JPS56158466 A JP S56158466A
Authority
JP
Japan
Prior art keywords
oxide film
electrode
metal layer
layer
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6296480A
Other languages
Japanese (ja)
Other versions
JPH0122989B2 (en
Inventor
Yoshihide Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6296480A priority Critical patent/JPS56158466A/en
Publication of JPS56158466A publication Critical patent/JPS56158466A/en
Publication of JPH0122989B2 publication Critical patent/JPH0122989B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the dielectric breakdown at the outlet section of a capacity electrode by a method wherein the metal layer provided on a thin insulating film and the metal layer provided on a thick oxide film are connected using a tunnel wiring. CONSTITUTION:A metal wiring layer 13 is formed by providing an aperture and using the N<+> region 15, provided on an N type substrate 17, as the electrode on one side of a capacitor. A thin oxide film 18 is formed on the N<+> region 15, on the upper part of which a metal layer 12 is formed using the film 18 as the electrode on the other side of the capacitor. The oxide film 18 and the metal layer 12 are extended, and the substrate 17, the N<+> diffusion layer (a tunnel wiring) 14 which is isolated by the substrate 17 and a P type diffusion layer 16, and a metal layer 12 are connected by providing an aperture on the oxide film 18. An aperture is provided on the oxide film (to be thickly formed) of the tunnel wiring 14 and a capacity electrode 12 is led out by a metal wiring layer 11. Through these procedures, the short circuit which will be caused by dielectrode breakdown can be prevented by not providing the section having varied film thickness on the oxide film at the lower part of the electrode 12.
JP6296480A 1980-05-13 1980-05-13 Semiconductor device Granted JPS56158466A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6296480A JPS56158466A (en) 1980-05-13 1980-05-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6296480A JPS56158466A (en) 1980-05-13 1980-05-13 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS56158466A true JPS56158466A (en) 1981-12-07
JPH0122989B2 JPH0122989B2 (en) 1989-04-28

Family

ID=13215516

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6296480A Granted JPS56158466A (en) 1980-05-13 1980-05-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56158466A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5965461A (en) * 1982-10-06 1984-04-13 Toshiba Corp Semiconductor device
JPH0196955A (en) * 1987-10-09 1989-04-14 Hitachi Ltd Semiconductor device and manufacture thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5241150A (en) * 1975-09-29 1977-03-30 Nippon Steel Corp Method to adjust slab width of plate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5241150A (en) * 1975-09-29 1977-03-30 Nippon Steel Corp Method to adjust slab width of plate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5965461A (en) * 1982-10-06 1984-04-13 Toshiba Corp Semiconductor device
JPH0196955A (en) * 1987-10-09 1989-04-14 Hitachi Ltd Semiconductor device and manufacture thereof

Also Published As

Publication number Publication date
JPH0122989B2 (en) 1989-04-28

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