JPS56142649A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56142649A
JPS56142649A JP4460480A JP4460480A JPS56142649A JP S56142649 A JPS56142649 A JP S56142649A JP 4460480 A JP4460480 A JP 4460480A JP 4460480 A JP4460480 A JP 4460480A JP S56142649 A JPS56142649 A JP S56142649A
Authority
JP
Japan
Prior art keywords
region
type
channel
channel stopper
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4460480A
Other languages
Japanese (ja)
Other versions
JPS6310900B2 (en
Inventor
Toshikatsu Shirasawa
Kiyoshi Tsukuda
Yoshitaka Sugawara
Yoshikazu Hosokawa
Tatsuya Kamei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4460480A priority Critical patent/JPS56142649A/en
Publication of JPS56142649A publication Critical patent/JPS56142649A/en
Publication of JPS6310900B2 publication Critical patent/JPS6310900B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To increase the withstand voltage of a channel stopper by forming a field alleviating region between a p-n junction and the channel stopper. CONSTITUTION:With an oxide film as a mask an inverted V-shaped groove 22 is formed by alkaline etchant on an n type semiconductor substrate 21, an n<++> type channel stopper 23 is formed by diffusing arsenic or phosphorus or the like or implanting ions thereon, then a dielectric isolating oxide film 24 is formed thereon, and a polycrystalline silicon 25 is formed by a vapor growth method. Thereafter, it is polished from the upper surface shown, and then a field alleviating n<+> type region 26, an oxide film 27, a p type region 28 and an aluminum wire 29 are formed. The region 26 has the same conductivity type as the channel stopper and lower impurity density than that. A depletion layer is formed on the region surrounded by a broken line upon application of a voltage thereto, but the field can be alleviated by the region 26, and the channel can be effectively stopped without concentrating the electric field in the channel stop.
JP4460480A 1980-04-07 1980-04-07 Semiconductor device Granted JPS56142649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4460480A JPS56142649A (en) 1980-04-07 1980-04-07 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4460480A JPS56142649A (en) 1980-04-07 1980-04-07 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS56142649A true JPS56142649A (en) 1981-11-07
JPS6310900B2 JPS6310900B2 (en) 1988-03-10

Family

ID=12696045

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4460480A Granted JPS56142649A (en) 1980-04-07 1980-04-07 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56142649A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0596414A2 (en) * 1992-11-06 1994-05-11 Hitachi, Ltd. Semiconductor integrated circuit device comprising a dielectric isolation structure

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5164876A (en) * 1974-12-03 1976-06-04 Nippon Electric Co ZETSUENGEETOGATADENKAIKOKAHANDOTAISOCHINOSEIZOHOHO

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5164876A (en) * 1974-12-03 1976-06-04 Nippon Electric Co ZETSUENGEETOGATADENKAIKOKAHANDOTAISOCHINOSEIZOHOHO

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0596414A2 (en) * 1992-11-06 1994-05-11 Hitachi, Ltd. Semiconductor integrated circuit device comprising a dielectric isolation structure
EP0596414A3 (en) * 1992-11-06 1997-10-15 Hitachi Ltd Semiconductor integrated circuit device comprising a dielectric isolation structure.
US5747829A (en) * 1992-11-06 1998-05-05 Hitachi, Ltd. Dielectric isolated high voltage semiconductor device

Also Published As

Publication number Publication date
JPS6310900B2 (en) 1988-03-10

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