JPS56140643A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56140643A
JPS56140643A JP4298580A JP4298580A JPS56140643A JP S56140643 A JPS56140643 A JP S56140643A JP 4298580 A JP4298580 A JP 4298580A JP 4298580 A JP4298580 A JP 4298580A JP S56140643 A JPS56140643 A JP S56140643A
Authority
JP
Japan
Prior art keywords
film
substrate
si3n4
mask
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4298580A
Other languages
Japanese (ja)
Inventor
Osamu Ishikawa
Takeya Ezaki
Masabumi Kubota
Kosei Kajiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4298580A priority Critical patent/JPS56140643A/en
Publication of JPS56140643A publication Critical patent/JPS56140643A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To prevent the lateral spread of an oxide film by selectively forming an SiO2 film on an Si substrate and oxidizing the top and the side thereof with Si3N4 as a mask. CONSTITUTION:The Si3N4 mask 7' is provided so as to cover the top and the sides of the SiO2 film 6' which is selectively provided on the Si substrate 1, and selective oxidating treatment is performed. In this method, a sufficiently thick SiO2 film 8 can be formed under the state a peak end B2 is contacted with the film 6', stress in the vicinity of the substrate surface is small, the lateral spread of the film 8 can be made small, and the high density devices can be obtained.
JP4298580A 1980-04-01 1980-04-01 Manufacture of semiconductor device Pending JPS56140643A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4298580A JPS56140643A (en) 1980-04-01 1980-04-01 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4298580A JPS56140643A (en) 1980-04-01 1980-04-01 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56140643A true JPS56140643A (en) 1981-11-04

Family

ID=12651321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4298580A Pending JPS56140643A (en) 1980-04-01 1980-04-01 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56140643A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5057451A (en) * 1990-04-12 1991-10-15 Actel Corporation Method of forming an antifuse element with substantially reduced capacitance using the locos technique

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51124381A (en) * 1975-04-16 1976-10-29 Ibm Method of manufacturing semiconductor device using twoolayer mask

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51124381A (en) * 1975-04-16 1976-10-29 Ibm Method of manufacturing semiconductor device using twoolayer mask

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5057451A (en) * 1990-04-12 1991-10-15 Actel Corporation Method of forming an antifuse element with substantially reduced capacitance using the locos technique

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